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UPD30121 Datasheet(PDF) 55 Page - NEC |
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UPD30121 Datasheet(HTML) 55 Page - NEC |
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55 / 76 page  Data Sheet U14691EJ1V0DS00 55 µµµµPD30121 (13) System bus parameter (ZWS#) (2/2) Invalid When WISAA (0:2) bits = 101, BSEL bit = 0 BUSCLKNote 1 (output) BUSCLKNote 1 (output) BUSCLKNote 1 (output) BUSCLKNote 1 (output) ADD (19:25), ADD (0:8) (output) ADD (9:18) (output) SHB# (output) MEMR#/MEMW#, IOR#/IOW# (output) IOCHRDY (input) ZWS# (input) DATA (output) DATA (input) Invalid tAVCKNote 2 tCLCKNote 2 tCLCH tCHAV tCHCL tCHDV tDH tDS tDVCL tAVCL Invalid tCLZL tCHZH MEMCS16#, IOCS16# (input) tCHSV tAVSV2 Notes 1. This indicates that there are four possible relationships between BUSCLK signal and other system bus interface signals. 2. This indicates the minimum setup time to the BUSCLK signal rising or falling edge. Remark The broken lines indicate high impedance. |
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