UPD78P014 datasheet(25/62 Pages) NEC

25 / 62 page

µPD78P014

Main System Clock Oscillator Characteristics (Ta = –40 to +85

°C, VDD = 2.7 to 6.0 V)

Recommended

Circuit

Resonator

Ceramic

resonator

Crystal

resonator

External clock

Parameter

Oscillation frequency

(fX)Note 1

Oscillation stabiliza-

tion timeNote 2

Oscillation frequency

(fX)Note 1

Oscillation stabiliza-

tion timeNote 2

X1 input frequency

(fX)Note 1

X1 input high-/low-

level width (tXH/tXL)

MIN.

TYP.

MAX.

Unit

MHz

4ms

8.38

MHz

1.0

10.0

MHz

42.5

500

Notes 1. Only the oscillator characteristics are shown. Refer to AC characteristics for instruction execution times.

2. This is the time required for oscillation to stabilize after a reset or STOP mode release.

Cautions 1. When the main system clock oscillator is used, the following should be noted concerning wiring in

the area in the figure enclosed by a dotted line to prevent the influence of wiring capacitance, etc.

• The wiring should be kept as short as possible.

• No other signal lines should be crossed.

• Keep away from lines carrying a high fluctuating current.

• The oscillator capacitor grounding point should always be at the same potential as VSS.

• Do not connect to a ground pattern carrying a high current.

• A signal should not be taken from the oscillator.

2. When the main system clock is stopped and the device is operating on the subsystem clock, wait until

the oscillation stabilization time has been secured by the program before switching back to the main

system clock.

Test Conditions

VDD = Oscillation voltage

range

After VDD has reached

MIN. of oscillation

voltage range

VDD = 4.5 to 6.0 V

Vss

PD74HCU04

UPD78P014 Datasheet(PDF) 25 Page - NEC

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