UPD78P014 datasheet(29/62 Pages) NEC

29 / 62 page

µPD78P014

Test Conditions

VOUT = VDD

VOUT = 0 V

VIN = 0 V, P01 to P03,

P10 to P17, P20 to P27,

4.5 V

≤ V

DD ≤ 6.0 V

P30 to P37, P40 to P47,

P50 to P57, P64 to P67

2.7 V

≤ V

DD < 4.5 V

8.38 MHz crystal oscilla-

VDD = 5.0 V

± 10%Note 1

tion operating mode

VDD = 3.0 V

± 10%Note 2

8.38 MHz crystal oscilla-

VDD = 5.0 V

± 10%

tion HALT mode

VDD = 3.0 V

± 10%

32.768 kHz crystal oscilla- VDD = 5.0 V

± 10%

tion operating mode

VDD = 3.0 V

± 10%

32.768 kHz crystal oscilla- VDD = 5.0 V

± 10%

tion HALT mode

VDD = 3.0 V

± 10%

XT1 = 0 V

VDD = 5.0 V

± 10%

STOP mode

VDD = 3.0 V

± 10%

Feedback resistor used

XT1 = 0 V

VDD = 5.0 V

± 10%

STOP mode

Feedback resistor

VDD = 3.0 V

± 10%

not used

DC Characteristics (Ta = –40 to +85

°C, VDD = 2.7 to 6.0 V)

MIN.

TYP.

MAX.

Unit

µA

–3

µA

Ω

500

Ω

927

1.4

4.2

550

1650

µA

180

µA

100

µA

510

µA

130

µA

0.5

µA

0.1

µA

0.05

µA

Symbol

ILOH1

ILOL

IDD1

IDD2

IDD3

IDD4

IDD5

IDD6

Parameter

Output leakage current

high

Output leakage current

low

Software pull-up resistor

Supply currentNote 3

Notes 1. High-speed mode operation (when processor clock control register is set to 00H).

2. Low-speed mode operation (when processor clock control register is set to 04H).

3. Not including AVREF currents or port currents

Remark Unless otherwise specified, alternate function pin characteristics are the same as port pin characteristics.

UPD78P014 Datasheet(PDF) 29 Page - NEC

UPD78P014 Datasheet(HTML) 29 Page - NEC

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