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LMX2433 Datasheet(PDF) 29 Page - Texas Instruments |
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LMX2433 Datasheet(HTML) 29 Page - Texas Instruments |
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29 / 53 page ![]() LMX2430, LMX2433, LMX2434 www.ti.com SNAS187D – FEBRUARY 2003 – REVISED JANUARY 2016 Device Functional Modes (continued) reference divider are held at their load point. This allows the reference oscillator, feedback divider, reference divider, and prescaler circuitry to reach proper bias levels. After a finite delay, the feedback and reference dividers are enabled and resume counting in close alignment (the maximum error is one prescaler cycle). The MICROWIRE control register remains active and capable of loading and latching data while in power-down mode. 9.4.1.1 Synchronous Power-Down Mode In this mode, the power-down function is gated by the charge pump. When the device is configured for synchronous power down, the device enters the power-down mode upon completion of the next charge-pump pulse event. 9.4.1.2 Asynchronous Power-Down Mode In the asynchronous power-down mode, the power-down function is NOT gated by the completion of a charge- pump pulse event. When the device is configured for asynchronous power down, the part goes into power-down mode immediately. Table 7. Power-Down Modes RF_CPT / IF_CPT RF_PD / EN PIN OPERATING MODE BIT IF_PD BIT 0 X(1) X(1) Asynchronous Power Down 1 0 0 PLL Active. Normal Operation 1 1 0 PLL Active. Charge-Pump Output in High-Impedance State 1 0 1 Synchronous Power Down 1 1 1 Asynchronous Power Down (1) X refers to a don’t care condition. 9.5 Programming 9.5.1 Microwire Interface The 24-bit shift register is loaded through the MICROWIRE interface. The shift register consists of a 21-bit DATA[20:0] FIELD and a 3-bit ADDRESS[2:0] FIELD as shown in Table 8. The ADDRESS FIELD is used to decode the internal control register address. When LE transitions HIGH, DATA stored in the shift register is loaded into one of 6 control registers depending on the state of the ADDRESS bits. The MSB of DATA is loaded into the shift register first. The DATA FIELD assignments are shown in Control Register Content Map. Table 8. Register Structure MSB LSB DATA[20:0] ADDRESS[2:0] 23 3 2 0 Copyright © 2003–2016, Texas Instruments Incorporated Submit Documentation Feedback 29 Product Folder Links: LMX2430 LMX2433 LMX2434 |
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