C164CI datasheet(7/53 Pages) INFINEON

7 / 53 page

Semiconductor Group

1998-02

C164CI

External Memory Read Strobe. RD is activated for every

external instruction or data read access.

WR /

WRL

External Memory Write Strobe. In WR-mode this pin is

activated for every external data write access. In WRL-mode

this pin is activated for low byte data write accesses on a 16-

bit bus, and for every data write access on an 8-bit bus. See

WRCFG in register SYSCON for mode selection.

ALE

Address Latch Enable Output. Can be used for latching the

address into external memory or an address latch in the

multiplexed bus modes.

External Access Enable pin. A low level at this pin during and

after Reset forces the C164CI to begin instruction execution

out of external memory. A high level forces execution out of

the internal ROM.

Note: This pin also accepts the programming voltage for OTP

versions of the C164CI.

PORT0:

P0L.0 –

P0L.7,

P0H.0 -

P0H.7

29 -

37 - 39,

42 - 46

I/O

PORT0 consists of the two 8-bit bidirectional I/O ports P0L

and P0H. It is bit-wise programmable for input or output via

direction bits. For a pin configured as input, the output driver

is put into high-impedance state.

In case of an external bus configuration, PORT0 serves as

the address and data (AD) bus.

Data Path Width:

8-bit

16-bit

P0L.0 – P0L.7:

AD0 – AD7

AD0 - AD7

P0H.0 – P0H.7:

A8 - A15

AD8 - AD15

Pin Definitions and Functions (cont’d)

Symbol

Number

Input (I)

Output (O)

Function

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