C164CI datasheet(19/53 Pages) INFINEON

19 / 53 page

Semiconductor Group

1998-02

C164CI

General Purpose Timer (GPT) Unit

The GPT unit represents a very flexible multifunctional timer/counter structure which may be used

for many different time related tasks such as event timing and counting, pulse width and duty cycle

measurements, pulse generation, or pulse multiplication.

The GPT unit incorporates three 16-bit timers. Each timer may operate independently in a number

of different modes, or may be concatenated with another timer.

Timer T3 can be configured for one of four basic modes of operation, which are Timer, Gated Timer,

Counter, and Incremental Interface Mode. Timers T2 and T4 can only be operated in timer mode.

In Timer Mode, the input clock for a timer is derived from the CPU clock, divided by a programmable

prescaler, while Counter Mode allows a timer to be clocked in reference to external events.

Pulse width or duty cycle measurement is supported in Gated Timer Mode, where the operation of

a timer is controlled by the ‘gate’ level on an external input pin. For these purposes the associated

port pin (T3IN) serves as gate or clock input. The maximum resolution of the timers is 400 ns (@

20 MHz CPU clock).

The count direction (up/down) for each timer is programmable by software or may additionally be

altered dynamically by an external signal on pin T3EUD for T3 to facilitate eg. position tracking.

In Incremental Interface Mode timer T3 can be directly connected to the incremental position sensor

signals A and B via the respective inputs T3IN and T3EUD. Direction and count signals are

internally derived from these two input signals, so the contents of timer T3 corresponds to the

sensor position. The third position sensor signal TOP0 can be connected to an interrupt input.

Timer T3 has an output toggle latch (T3OTL) which changes its state on each timer over-flow/

underflow. The state of this latch may be used internally to clock timers T2 and T4 for measuring

long time periods with high resolution.

In addition to their basic operating modes, timers T2 and T4 may be configured as reload registers

for timer T3. When used as reload registers, timers T2 and T4 are stopped. Timer T3 is reloaded

with the contents of T2 or T4 triggered by a selectable state transition of its toggle latch T3OTL.

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