TMDS181I datasheet(36/58 Pages) TI1

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TMDS181, TMDS181I

SLASE75A – AUGUST 2015 – REVISED OCTOBER 2015

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8.5.3.3 Equalization Control Register

Table 7. Equalization Control Register Field Descriptions

ADDRESS

BITS

DEFAULT DESCRIPTION

ACCESS

0Dh

7:6

2’b00

Reserved

5:3

1’b000

Data lane EQ – Sets fixed EQ values

HDMI1.x

HDMI2.0a

000 – 0 dB (default)

001 – 4.5 dB

001 – 3 dB

010 – 6.5 dB

010 – 5 dB

011 – 8.5 dB

011 – 7.5 dB

100 – 10.5 dB

100 – 9.5 dB

101 – 12 dB

101 – 11 dB

110 – 14 dB

110 – 13 dB

111 – 16.5 dB

111 – 14.5 dB

2:1

1’b00

Clock lane EQ - Sets fixed EQ values

HDMI1.x

HDMI2.0a

00 – 0 dB (default)

01 – 1.5 dB

10 – 3 dB

11 – RSVD

11 – 4.5 dB

1’b0

DIS_HDMI2_SWG:

0 – Clock VOD is half of set values when TMDS_CLOCK_RATIO_STATUS states

in HDMI2.0a mode (default)

1 – Disables TMDS_CLOCK_RATIO_STATUS control of the clock VOD so output

swing is at full swing.

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