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TMDS181I Datasheet(PDF) 5 Page - Texas Instruments |
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TMDS181I Datasheet(HTML) 5 Page - Texas Instruments |
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5 / 58 page ![]() TMDS181, TMDS181I www.ti.com SLASE75A – AUGUST 2015 – REVISED OCTOBER 2015 Pin Functions(1) (continued) PIN TYPE(2) DESCRIPTION NAME NO. I2C data signal SDA_CTL 16 I/0 Note: When I2C_EN = Low Pin strapping takes priority and those functions cannot be changed by I2C VSadj 22 I TMDS-compliant voltage swing control nominal resistor to GND High address bit 2 for I2C programming A1 27 I Weak internal pull down Note: When in Pin Strapping Mode leave pin as No connect Transmit termination control TX_TERM_CTL = H, no transmit termination TX_TERM_CTL = L, transmit termination impedance in approximately 75 to 150 Ω I TX_TERM_CTL = No Connect, automatically selects the termination impedance TX_TERM_CTL 36 3 level Data rate (DR) > 3.4 Gbps – 75 to 150 Ω differential near end termination 2 Gbps > DR < 3.4 Gbps – 150 to 300 Ω differential near end termination DR < 2 Gbps – no termination Note: If left floating will be in automatic select mode. Input lane SWAP and polarity control pin I SWAP/POL = H: receive lanes polarity swap (retimer mode only) SWAP/POL 1 3 level SWAP/POL = L: receive lanes swap (redriver and retimer mode) SWAP/POL = No Connect: normal operation NC 18, 40 NA No connect 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) (2) MIN MAX UNIT VCC –0.3 4 Supply voltage(3) V VDD –0.3 1.4 Main link input differential voltage (IN_Dx, IN_CLKx) IIN = 15mA VCC - 0.75V VCC + 0.3V TMDS outputs ( OUT_Dx) –0.3 4 Voltage V HPD_SRC, Vsadj, SDA_CTL, SCL_CTL, OE, A1, PRE_SEL, EQ_SEL/A0, –0.3 4 I2C_EN/PIN, SIG_EN, TX_TERM_CTL, HDP_SNK, SDA_SNK, SCL_SNK, SDA_SRC, SCL_SRC –0.3 6 Input Current IIN Main link input current (IN_Dx, IN_CLKx) 15 mA Continuous power dissipation See Thermal Information Tstg Storage temperature –65 150 °C (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltage values, except differential voltages, are with respect to network ground terminal. (3) Tested in accordance with JEDEC Standard 22, Test Method A114-B 6.2 ESD Ratings VALUE UNIT Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 Electrostatic V(ESD) V discharge Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±500 (1) JEDEC document JEP155 states that 500 V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250 V CDM allows safe manufacturing with a standard ESD control process. Copyright © 2015, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: TMDS181 TMDS181I |
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