TMDS181I datasheet(11/58 Pages) TI1

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Retimer mode

CDR Active

Td3

Td4

OE De-assert or

HPD_SNK De-assert or

Redriver mode

Td2

Td1

Vdd

Vcc

TMDS181, TMDS181I

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SLASE75A – AUGUST 2015 – REVISED OCTOBER 2015

6.9 Power-Up and Operation Timing Requirements

over operating free-air temperature range (unless otherwise noted)

(1)

MIN

NOM

MAX

UNIT

td1

VDD stable before VCC

200

µs

td2

VDD and VCC stable before OE assertion

100

µs

td3

CDR active operation after retimer mode initial

td4

CDR turn off time after retimer mode de-assert

120

VDD_ramp

VDD supply ramp up requirements

0.2

100

VCC_ramp

VCC supply ramp up requirements

0.2

100

(1)

See Operation Timing for more information

Figure 1. Power-Up Timing for TMDS181

Figure 2. CDR Timing for TMDS181

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TMDS181I Datasheet(PDF) 11 Page - Texas Instruments

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