MCP19116 datasheet(52/246 Pages) MICROCHIP

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MCP19116/7

DS20005479B-page 52

 2015-2016 Microchip Technology Inc.

6.12

Mode and RFB MUX Control

The MODECON register controls the Master/Slave

configuration and the internal resistor feedback MUX

for the current sense amplifier while in quasi-resonant

mode.

In Master mode, it allows the VREF2 signal of the

Master MCP19116/7 device to be buffered and

connected to a GPIO pin. This output signal can be

connected to a Slave PWM driver (MCP1631) at the

VREF input to regulate current via the Slave PWM

Controller. In Master mode, the CLKOUT sync signal

is routed to GPA1. In Semi-Master Mode, users have

the option to implement VREF2 and CLKOUT

independently. In Stand-Alone mode, the VREF2 unity

gain buffer and CLKOUT signals are not connected to

GPIO Pins.

The RFB MUX selects the output of A2 current sense

amplifier to be connected to the internal 5 k

 feedback

resistor or to the ISOUT pin.

MODECON: MASTER/SLAVE AND RFB MUX CONTROL REGISTER

R/W-0

U-0

R/W-0

U-0

MSC1

MSC0

RFB

—MSC2

—

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

u = Bit is unchanged

x = Bit is unknown

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

bit 7-6

MSC<1:0>: Master/Slave Configuration bits

00 = Device set as stand-alone unit (VREF2 disabled, Switching frequency internally generated)

01 = Device set as MASTER (VREF2 to GPB1, CLKOUT sync to GPA1)

10 = Device set as SLAVE MODE (CLKIN switching frequency sync signal to GPA1)

11 = Device set to SEMI-MASTER MODE

bit 5

RFB: Current Sense Amplifier (A2) Output Resistor Feedback MUX Configuration bit

0 = RFB_INT 5 k

1 = ISOUT

bit 4

Unimplemented: Read as ‘0’

bit 3

MSC<2>: Semi-Master mode options

0 = GPB1 is VREF2 Output, GPA1 is general purpose I/O

1 = GPB1 is general purpose output, GPA1 is CLKOUT

bit 2-0

Unimplemented: Read as ‘0’

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