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PC87591L Datasheet(PDF) 272 Page - National Semiconductor (TI) |
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PC87591L Datasheet(HTML) 272 Page - National Semiconductor (TI) |
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272 / 437 page ![]() Embedded Controller Modules (Continued) www.national.com 272 Revision 1.07 4.20 DEVELOPMENT SYSTEM SUPPORT The PC87591x supports code development and debug in the On Board Development (OBD) and Development (DEV) envi- ronments. OBD environment is used for debug of the code in the final production board. DEV environment is used in Appli- cation Development Boards (ADBs) and ISE systems. 4.20.1 Features ● ISE clipping support via a TRI-STATE strap input (TRIS) Features available in OBD and DEV environments: ● Debugger interface via the JTAG based Debugger Interface module ● Internal ISE interrupt generation by the Debugger Interface module ● Internal Reset generation by the Debugger Interface module ● Ability to prevent real-time events from interfering with operation of ADB monitor ● Core-integrated hardware breakpoint Features available in DEV environment: ● Optional use of break line input signal ● Status Information to trace internal activities and implement debug features such as hardware breakpoint and traces ● Use of SRAM in the ADB for fast download of code during development Feature available in OBD environment: ● Use of on-chip flash for executing the final code 4.20.2 The ISE Interrupt The core ISE interrupt is an edge-triggered, non-maskable interrupt that is triggered on the rising edge of the Debugger in- terface output. The ISE interrupt is asserted by the Debugger Interface module for RX or ABORT events to the core. The ISE interrupt is enabled in DEV and OBD environments when ON bit in DBGCFG register is set to 1; otherwise, it is held inactive. 4.20.3 Break Line and Reset Output Interrupt The BRKL_RSTO signal is available in DEV environment. It has two functions: BRKL interrupt input and RSTO reset indi- cation. Multiplexing between the two functions is done based on bus activity as defined below. BRKL Function The BRKL interrupt input is enabled in DEV environment when ON and BRKLE in DBGCFG register are both set (1); other- wise, it is held inactive. When BRKL is active during an instruction fetch, it indicates to the core a request to break on the execution of the instruction (if the instruction is to be executed). This enables implementing multiple hardware breakpoints using external hardware. RSTO Function RSTO is a pulse output that is driven low when the PC87591x is in reset due to any of its sources (i.e., any reset to the core). This output may be used to set any required defaults in the development system. RSTO and BRKL Selection The BRKL_RSTO signal serves as input to the PC87591x whenever there is activity on the bus i.e., while either SELIO, SEL0 or SEL1 are active. If SELIO, SEL0 or SEL1 are inactive, the system must stop driving the BRKL_RSTO signal and hold it high using a pull-up resistor. When there is no activity on the bus, BRKL_RSTO may serve as output. It is driven low during an internal reset. There may be a delay from reset start to the signal being driven low, but it is guaranteed to be low for at least three CLK cycles. 4.20.4 TRIS Strap Input Pin The TRIS strap input signal is used by ISEs to allow clipping on a PC87591x while it is mounted in the production system. The TRIS input is sampled at VCC Power-Up reset while the device is in IRE or OBD environments. When TRIS is low (0), the PC87591x acts normally. When TRIS is high (1), all PC87591x outputs, except for DAC outputs and 32KX2, are put in TRI-STATE. Section 2.3 on page 53 describes the strap input handling. |
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