PC87591L datasheet(268/437 Pages) NSC

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Embedded Controller Modules (Continued)

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Revision 1.07

Debug Receive Status Register (DBGRXST)

DBGRXST is a byte-wide register updated by the TAP controller to reflect the PID and MSG_LEN fields of the SCAN_RX

instruction. Bits 1 to 7 of this register are read-only bits; data written to them is ignored. The register format is shown below.

Location: 00 FDE016

Type: Varies per bit

Debug Transmit Data Registers 0, 2, 4, 6, 8, 10, 12 and 14 (DBGTXD0-14)

DBGTXD0 to DBGTXD14 is a group of eight word-wide read/write registers. The DBGTXD0-14 registers are written by a

processor from the peripheral bus. A representative DBGTXDi register is shown below.

Location: Channel 0 - 00 FDD016

Channel 2 - 00 FDD216

Channel 4 - 00 FDD416

Channel 6 - 00 FDD616

Channel 8 - 00 FDD816

Channel 10 - 00 FDDA16

Channel 12 - 00 FDDC16

Channel 14 - 00 FDDE16

Type: R/W

Bit

76543210

Name

MSG_LEN

PID

RX_BUSY

Bit

Type

Description

R/W

RX_BUSY (Receive Busy). Data link busy indication. This bit can be cleared by writing 1 to it. Writing

0 is ignored.

0: Not Busy

1: Busy

4-1

PID (Processor Index). A write operation to this ﬁeld is ignored.

Bit Value

(Decimal) Description

Processor ID index

1-14:

Invalid

15:

All processors abort

7-5

MSG_LEN. The message length equals (MSG_LEN+1). Write operations to this ﬁeld are ignored.

Bit

9876543210

Name

TX_DATAi

Bit

Description

15-0

TX_DATAi (Transmit Data i). Data bits i*16 through i*16+15 of the transmit buffer.

PC87591L Datasheet(PDF) 268 Page - National Semiconductor (TI)

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