PC87591L datasheet(265/437 Pages) NSC

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Flash Data Register (FL_DATA)

FL_DATA is a shift register that enables scanning data for flash read and write. This register is used during both flash pro-

graming and flash read. It includes two fields: a 16-bit data field and two Control/Status bits. In Capture-DR state, data read

from the array (for either a read instruction or as a confirmation of a write cycle) is loaded from the Flash Read buffer into

FL_DATA register. The Valid and Error bits indicate if program and read operations are successfully completed. In Update-

DR state, data is loaded into the Flash Write Data buffer if the Valid bit in the data shifted in is set. The connection of the

Type: Varies per bit

Bit

Name

Error

Valid

Data

Reset

Bit

Type

Description

15-0

R/W

Data. In read, returns the data read from the ﬂash memory. Following a previous read instruction or a

set address, the data is read from the array with the currently held address. Following a previous write

instruction, the data is read back from the array as part of the write veriﬁcation.

During write instruction, data scanned into this ﬁeld, if the Valid bit is set, is loaded into the Flash Write

Data buffer and used for the next ﬂash programing action.

Valid. Indicates that the data read or written is valid.

On Read (Capture-DR):

0: Data is not valid, since the read was not completed or the write buffer is not ready to accept new data.

1: Indicates that data in the Data Read buffer is valid. This data may be the result of a read (following a

previous read instruction) or the result of a failed write. Note that when a 1 is read from this bit, it is

automatically cleared to 0. In a read instruction, a read of 1 triggers a new read operation from memory

with the successive address.

During flash write sequences, indicates that the write data buffer is ready to accept new data; the bit

is cleared when new data is written to the buffer.

On Write (Update-DR): This bit must be written with 0 during a read instruction or when the flash is not

ready to accept new data (i.e., when the Valid bit in the Capture-DR is cleared).

0: Data is not valid. Do not update the Flash Data Write buffer.

1: Indicates that valid data is written to the Flash Data Write buffer. In write instruction, this triggers the

ﬂash to be programed with new data.

Error. Indicates that an error occurred during the last programing cycle. The bit is set when the error

is detected.

0: Last write was completed successfully (default)

1: An error was detected during the last write. This may be due to a failed write, a double buffer error or

to an attempt to violate restrictions put by the flash contents protection mechanism. For more details

about the error type, see “Flash Control and Status Register (FL_CT_ST)” on page 262.

When set, the error is cleared by clearing any set error flag in FL_CT_ST register.

Figure 90. Flash Data Register

TDI

TDO

Flash Read Data Buffer

Flash Write Data Buffer

FL_DATA

Status

Control

PC87591L Datasheet(PDF) 265 Page - National Semiconductor (TI)

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