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PC87591L Datasheet(PDF) 396 Page - National Semiconductor (TI) |
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PC87591L Datasheet(HTML) 396 Page - National Semiconductor (TI) |
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396 / 437 page ![]() 7.0 Device Specifications (Continued) www.national.com 396 Revision 1.07 Figure 145. PS/2 Transmit Timing Figure 146. PS/2 Clock Signal Pulled Low by PC87591x 7.6.9 ACCESS.bus Timing Symbol Figure Description Reference Conditions Min Max Unit ACB Input Timing tBUFi 148 Bus free time between Stop and Start condition tSCLhigho - tCSTOsi 148 SCL setup time Before Stop condition 8 * tCLK − tSCLri - tCSTRhi 148, 149 SCL hold time After Start condition 8 * tCLK − tSCLri - tCSTRsi 149 SCL setup time Before Start condition 8 * tCLK − tSCLri - tDHCsi 149 Data high setup time Before SCL RE 2 * tCLK - tDLCsi 148 Data low setup time Before SCL RE 2 * tCLK - tSCLfi 147 SCL signal fall time 300 ns tSCLri 147 SCL signal rise time 1 µs tSCLlowi 150 SCL low time After SCL FE 16 * tCLK - PSDAT1-4 PSCLK1-4 tPSDOv tPSCLKl tPSCLKh tPSDOh PSCLK1-4 CLK tPSCLKa tPSCLKia |
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