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PC87591L Datasheet(PDF) 402 Page - National Semiconductor (TI) |
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PC87591L Datasheet(HTML) 402 Page - National Semiconductor (TI) |
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402 / 437 page ![]() 7.0 Device Specifications (Continued) www.national.com 402 Revision 1.07 7.6.13 Debugger Interface Timing Figure 156. Debugger I/F Setup Time, Hold Time and Recovery Time Figure 157. TCK Pulse Width Symbol Figure Description Reference Conditions Min Max Unit Debugger Interface Input Signals tS 156 TMS Setup Time Before RE TCK 7 ns tH 156 TMS Hold Time After RE TCK 2 ns tS 156 TDI Setup Time Before RE TCK 1 ns tH 156 TDI Hold Time After RE TCK 3.5 ns tHW 157 TCK High Pulse Width 15 ns tLW 157 TCK Low Pulse Width 5 ns fMAX Maximum TCK Clock Frequency 20 MHz Tpu 129 Wait Time Power-Up to TCK tIRST 1 1. See Section 7.6.2 on page 384. - Debugger Interface Output Signals tPLH tPLL 158 Propagation Delay TCK to TDO After FE TCK 3 3 22 22 ns tPLZ tPHZ 160 159 Disable Time TCK to TDO 2 2 22 22 ns tPZL tPZH 160 159 Enable Time TCK to TDO 3 3 22 22 ns tTINTh 161 TINT hld time After FE TCK 10 ns tTINTv 161 TINT valid time After RE CLK 25 ns TMS, TDI TCK t S 1.5V t H 1.5V TCK LOW-HIGH-LOW PULSE TCK HIGH-LOW-HIGH PULSE t HW, tLW 1.5V 1.5V |
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