DA7219 datasheet(4/123 Pages) DIALOG

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DA7219

Audio codec with Advanced Accessory Detect

Company confidential

Datasheet

Revision 2.1

17-Dec-2015

4 of 123

9.3.6.3

5-band equaliser .............................................................................. 33

9.3.6.4

DAC soft mute ................................................................................. 35

9.4

Output paths........................................................................................................................ 36

9.4.1

Digital to Analogue Converter (DAC)................................................................... 36

9.4.2

Headphone outputs ............................................................................................. 36

9.4.2.1

Buffer amplifier................................................................................. 36

9.4.2.2

Headphone amplifiers...................................................................... 37

9.4.3

Charge pump control ........................................................................................... 37

9.4.4

Tracking the demands on the charge pump output ............................................. 39

9.4.4.1

cp_mchange = 01 (tracking the PGA gain setting).......................... 39

9.4.4.2

cp_mchange = 10 (tracking the DAC signal setting) ....................... 39

9.4.4.3

cp_mchange = 11 (tracking the output signal magnitude) .............. 39

9.5

Advanced Accessory Detection (AAD) ............................................................................... 40

9.5.1

Configuring Advanced Accessory Detection (AAD) ............................................ 41

9.5.2

Detection of jack insertion or removal ................................................................. 44

9.5.3

Three-pole or four-pole jack insertion.................................................................. 45

9.5.4

Jack pin order detection with four-pole jacks....................................................... 45

9.5.5

Headphone output and line output ...................................................................... 46

9.5.6

Detection of buttons............................................................................................. 46

9.6

Clocking .............................................................................................................................. 49

9.6.1

MCLK input .......................................................................................................... 49

9.6.1.1

MCLK detection ............................................................................... 49

9.6.2

Audio reference oscillator .................................................................................... 49

9.6.3

PLL bypass mode ................................................................................................ 49

9.6.4

Normal PLL mode (DAI master) .......................................................................... 50

9.6.5

Example calculation of the feedback divider setting:........................................... 51

9.6.6

SRM PLL mode (DAI slave) ................................................................................ 52

9.7

Reference generation.......................................................................................................... 52

9.7.1

Voltage references............................................................................................... 52

9.7.2

Bias currents ........................................................................................................ 52

9.7.3

Voltage levels ...................................................................................................... 52

9.7.4

IO voltage level .................................................................................................... 52

9.8

I2C control interface ............................................................................................................ 53

9.9

Digital Audio Interface (DAI) ............................................................................................... 56

9.9.1

DAI channels ....................................................................................................... 57

9.9.2

I2S mode ............................................................................................................. 57

9.9.3

Left justified mode................................................................................................ 57

9.9.4

Right justified mode ............................................................................................. 57

9.9.5

DSP mode ........................................................................................................... 58

10 Register maps and definitions ................................................................................................... 59

11 Package information ................................................................................................................. 113

12 Ordering information ................................................................................................................ 114

Applications information ........................................................................................... 115

Appendix A

A.1

Codec initialisation ............................................................................................................ 115

A.2

Automatic ALC calibration................................................................................................. 115

Components................................................................................................................ 116

Appendix B

DA7219 Datasheet(PDF) 4 Page - Dialog Semiconductor

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