ML7396AB datasheet(124/140 Pages) LAPIS

124 / 140 page

FEDL7396A/B/E-07

ML7396A/B/E

124/140

●RX (without CCA)

Conditions

•Symbol rate:

100 kbps

•Preamble length: 4 byte

•SFD length:

2 byte

•Length:

2 byte

•CRC:

8 bit (1 byte)

•Data length:

100 byte

•Ramp control:

TRX_OFF command

RX_ON command

SET_TRX[3:0] =0b1000

([RF_STATUS:B0 0x6c(3-0)])

SET_TRX[3:0] =0b0110

([RF_STATUS:B0 0x6c(3-0)])

Read FIFO

DAT

TRX_OFF(IDLE)

RX_ON

RF status

PLL enable

RX enable

TRX_OFF(IDLE)

Data RX complete

PD_DATA_IND0/1

[PD_

A_IND: B0 0x29]

18μs

6μs

2*8*10μs=160μs

RXD enable

Demodulated

data

FIFO write enable

SFD

Length

Data

CRC

(100+1)*8*10μs=8,080μs

FIFO read enable

(SPI to FIFO)

RX data can be read from a FIFO.

The last data can be read after PDDATA_IND0/1=0b1.

The shortest read out time will be approx 8,240μs+ 16 SCLK cycles

from SFD detection (INT[11] , group2).

PSDU fileld data is stored into FIFO

(byte by byte)

SCEN

SINTN

INT[18]/INT[19] or

INT[20]/INT[21]

[INT_SOURCE_GRP3: B0 0x26]

INT[11] interrupt

[INT_SOURCE_GRP2: B0 0x25]

2μs

1μs

115.5μs

(17.78μs+[RX_ON_ADJ:B2 0x22])

1.11μs [RXD_ADJ:B2 0x24]

INT[10] interrupt

[INT_SOURCE_GRP2:B0 0x25]

INT[10] interrupt

[INT_SOURCE_GRP2:B0 0x25]

ML7396AB Datasheet(PDF) 124 Page - LAPIS Semiconductor Co., Ltd.

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