DS2155 datasheet(222/262 Pages) DALLAS

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DS2156

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31.2 UTOPIA Backplane Mode

ATM traffic can be assigned on a fractional basis. See Section 24 for UTOPIA operation.

CCR3

Common Control Register 3

72h

Bit #

Name

TMSS

INTDIS

CTTUI

CRRUI

TDATFMT

TGPCKEN

RDATFMT

RGPCKEN

Default

Bit 0/Receive Gapped-Clock Enable (RGPCKEN)

0 = RCHCLK functions normally

1 = enable gapped bit-clock output on RCHCLK

Bit 1/Receive Channel-Data Format (RDATFMT)

0 = 64kbps (data contained in all 8 bits)

1 = 56kbps (data contained in seven out of the 8 bits)

Bit 2/Transmit Gapped-Clock Enable (TGPCKEN)

0 = TCHCLK functions normally

1 = enable gapped bit-clock output on TCHCLK

Bit 3/Transmit Channel-Data Format (TDATFMT)

0 = 64kbps (data contained in all 8 bits)

1 = 56kbps (data contained in seven out of the 8 bits)

Bit 4/Connect RCLK to Receive UTOPIA Interface (CRRUI). This bit selects either a constant clock (RCLK)

or a gapped clock from the framer (programmed by the user) as its data clock.

0 = gated clock is connected to receive UTOPIA interface

1 = RCLK is connected to receive UTOPIA interface

Bit 5/Connect TCLK to Transmit UTOPIA Interface (CTTUI). This bit selects either a constant clock (TCLK)

or a gapped clock from the framer (programmed by the user) as its data clock.

0 = gated clock is connected to transmit UTOPIA interface

1 = TCLK is connected to transmit UTOPIA interface

Bit 6/Interrupt Disable (INTDIS). This bit is convenient for disabling interrupts without altering the various

interrupt mask register settings.

0 = interrupts are enabled according to the various mask register settings

1 = interrupts are disabled regardless of the mask register settings

Bit 7/Transmit Multiframe Sync Source (TMSS). Should be set = 0 only when transmit hardware signaling is

enabled.

0 = elastic store is source of multiframe sync

1 = framer or TSYNC pin is source of multiframe sync

DS2155 Datasheet(PDF) 222 Page - Dallas Semiconductor

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