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DS2155 Datasheet(PDF) 245 Page - Dallas Semiconductor |
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DS2155 Datasheet(HTML) 245 Page - Dallas Semiconductor |
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245 / 262 page  DS2156 245 of 262 Figure 34-22. Transmit IBO Channel Interleave Mode Timing Note 1: 4.096MHz bus configuration. Note 2: 8.192MHz bus configuration. Note 3: 16.384MHz bus configuration. Note 4: TSYNC is in input mode. TSER LSB TSYSCLK TSYNC FRAMER2, CHANNEL 32 MSB LSB FRAMER 1, CHANNEL 1 TSIG FRAMER2, CHANNEL 32 FRAMER 1, CHANNEL 1 MSB LSB FRAMER2, CHANNEL 1 FRAMER2, CHANNEL 1 4 TSER TSSYNC TRSIG TSER TSIG F3 32 F4 32 F1 C1 F2 C1 F3 C1 F4 C1 F1 C2 F2 C2 F3 C2 F4 C2 1 1 2 2 BIT LEVEL DETAIL (4.096MHz bus configurtation) F2 C32 F1 C1 F2 C1 F1 C2 F2 C2 F2 C32 F1 C1 F2 C1 F1 C2 F2 C2 F3 C32 F4 C32 F1 C1 F2 C1 F3 C1 F4 C1 F1 C2 F2 C2 F3 C2 F4 C2 ABC D ABC D ABC D TSER TSIG 3 3 F1 C1 F2 C1 F3 C1 F4 C1 F5 C1 F6 C1 F7 C1 F8 C1 F1 C2 F2 C2 F3 C2 F4 C2 F5 C2 F6 C2 F7 C2 F8 C2 F5 C32 F6 C32 F7 C32 F8 C32 F1 C1 F2 C1 F3 C1 F4 C1 F5 C1 F6 C1 F7 C1 F8 C1 F1 C2 F2 C2 F3 C2 F4 C2 F5 C2 F6 C2 F7 C2 F8 C2 F5 C32 F6 C32 F7 C32 F8 C32 FRAMER #1, CHANNEL #1 |
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