MCP19124 datasheet(39/236 Pages) MICROCHIP

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 2016 Microchip Technology Inc.

DS20005619A-page 39

MCP19124/5

6.0

CONFIGURING THE

MCP19124/5

The MCP19124/5 are analog controllers with a digital

peripheral. This means that device configuration is

handled through register settings instead of adding

external components. There are several internal

configurable comparator modules used to interface

analog circuits to digital processing that are very similar

to a standard comparator module found in many PIC

processors today (i.e., PIC16F1824/1828). The

following sections detail how to set the analog control

registers for all the configurable parameters.

6.1

Input Undervoltage and

Overvoltage Lockout

(UVLO and OVLO)

VINCON is the comparator control register for both the

VINUVLO and VINOVLO registers. It contains the

enable bits, the polarity edge detection bits and the

status output bits for both protection circuits. The

interrupt flags UVLOIF and OVLOIF in the PIR2

OVLOEN bits in the VINCON register. The UVLOOUT

undervoltage lockout status output bit in the VINCON

OVLOOUT overvoltage lockout status output bit in the

VINCON register indicates if an OVLO event has

occurred.

The VINUVLO register contains the digital value that

sets the input undervoltage lockout. UVLO has a range

of 4V to 20V. For VIN values below this range and

above processor come-alive (VDD =2V), the UVLO

comparator and the UVLOOUT status bit will indicate

an undervoltage condition. If using UVLO to determine

power-up VIN, it is recommended to poll the

UVLOOUT bit for status. When the input voltage on the

VIN pin to the MCP19124/5 is below this programmed

level and the UVLOEN bit in the VINCON register is

set, both PDRV and SDRV gate drivers are disabled.

This bit is automatically cleared when the MCP19124/5

VIN voltage rises above this programmed level.

The VINOVLO register contains the digital value that

sets the input overvoltage lockout. OVLO has a range

of 8.8V to 44V. When the input voltage on the VIN pin to

the MCP19124/5 is above this programmed level and

the OVLOEN bit in the VINCON register is set, both

PDRV and SDRV gate drivers are disabled. This bit is

automatically cleared when the MCP19124/5 VIN

voltage drops below this programmed level.

Note:

The UVLOIF and OVLOIF interrupt flag

bits are set when an interrupt condition

occurs, regardless of the state of its

corresponding enable bit or the Global

Enable bit (GIE) in the INTCON register.

VINCON: UVLO AND OVLO COMPARATOR CONTROL REGISTER

R/W-0

R-0

R/W-0

R-0

R/W-0

UVLOEN

UVLOOUT

UVLOINTP

UVLOINTN

OVLOEN

OVLOOUT

OVLOINTP

OVLOINTN

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

x = Bit is unchanged

x = Bit is unknown

-n = Value at POR

‘1’

= Bit is set

‘0’

= Bit is cleared

bit 7

UVLOEN: UVLO Comparator Module Logic Enable bit

= UVLO Comparator Module Logic enabled

= UVLO Comparator Module Logic disabled

bit 6

UVLOOUT: Undervoltage Lockout Status Output

= UVLO event has occurred

= No UVLO event has occurred

bit 5

UVLOINTP: UVLO Comparator Interrupt on Positive Going Edge Enable bit

= The UVLOIF interrupt flag will be set upon a positive going edge of the UVLO

= No UVLOIF interrupt flag will be set upon a positive going edge of the UVLO

bit 4

UVLOINTN: UVLO Comparator Interrupt on Negative Going Edge Enable bit

= The UVLOIF interrupt flag will be set upon a negative going edge of the UVLO

= No UVLOIF interrupt flag will be set upon a negative going edge of the UVLO

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