MCP19124 datasheet(16/236 Pages) MICROCHIP

16 / 236 page

MCP19124/5

DS20005619A-page 16

 2016 Microchip Technology Inc.

2.1.8

GPB0 PIN

GPB0 is a true open-drain general-purpose pin whose

data direction is controlled in TRISGPB. There is no

internal connection between this pin and device VDD.

This pin does not have a weak pull-up, but

interrupt-on-change

available.

When

the

MCP19124/5 are configured for I2C communication,

Section 28.2 “I2C Mode Overview”, GPB0 functions

as the I2C clock (SDA). This pin must be configured as

an input to allow proper operation.

2.1.9

GPB1 PIN

GPB1 is a general-purpose TTL input or CMOS output

pin whose data direction is controlled in TRISGPB. An

internal weak pull-up and interrupt-on-change are also

available.

AN4 is an input to the A/D. To configure this pin to be

read by the A/D on channel 4, bits TRISB1 and ANSB1

must be set.

When the MCP19124/5 are configured as a master,

this pin can be configured to be the VREF2 DAC output.

2.1.10

GPB4 PIN (MCP19125 ONLY)

GPB4 is a general-purpose TTL input or CMOS output

pin whose data direction is controlled in TRISGPB. An

internal weak pull-up and interrupt-on-change are also

available.

AN5 is an input to the A/D. To configure this pin to be

read by the A/D on channel 5, bits TRISB4 and ANSB4

must be set.

ICSPDAT is the primary serial programming data I/O

function. This is used in conjunction with ICSPCLK to

serial program the device.

2.1.11

GPB5 PIN (MCP19125 ONLY)

GPB5 is a general-purpose TTL input or CMOS output

pin whose data direction is controlled in TRISGPB. An

internal weak pull-up and interrupt-on-change are also

available.

AN6 is an input to the A/D. To configure this pin to be

read by the A/D on channel 6, bits TRISB5 and ANSB5

must be set.

ICSPCLK is the primary serial programming clock

function. This is used in conjunction with ICSPDAT to

serial program the device.

2.1.12

GPB6 PIN (MCP19125 ONLY)

GPB6 is a general-purpose TTL input or CMOS output

pin whose data direction is controlled in TRISGPB. An

internal weak pull-up and interrupt-on-change are also

available.

AN7 is an input to the A/D. To configure this pin to be

read by the A/D on channel 7, bits TRISB6 and ANSB6

must be set.

2.1.13

GPB7 PIN (MCP19125 ONLY)

GPB7 is a general-purpose TTL input or CMOS output

pin whose data direction is controlled in TRISGPB. An

internal weak pull-up and interrupt-on-change are also

available.

GPB7 is part of the CCD Module. For more information,

refer to Section 24.0 “Dual Capture/Compare (CCD)

Module”.

2.1.14

DESATN PIN

Internal comparator inverting input. Used during

quasi-resonant operation for desaturation detection.

2.1.15

DESATP PIN

When using the internal comparator for desaturation

detection during quasi-resonant operation, this pin

connects to the comparator’s noninverting input.

2.1.16

ISP PIN

The noninverting input to internal current sense

amplifier, typically used to differentially remote sense

secondary current. This pin can be internally pulled-up

to VDD by setting the ISPUEN bit in the PE1 register.

2.1.17

ISN PIN

The inverting input to internal current sense amplifier,

typically used to differentially remote sense secondary

current.

2.1.18

IP PIN

Primary input current sense for current mode control

and peak current limit. For voltage mode control, this

pin can be connected to an artificial ramp.

2.1.19

AGND PIN

AGND is the small signal ground connection pin. This

pin should be connected to the exposed pad on the

bottom of the package.

2.1.20

PGND PIN

Connect all large signal level ground returns to PGND.

These large-signal level ground traces should have a

small loop area and minimal length to prevent coupling

of switching noise to sensitive traces.

2.1.21

SDRV PIN

The gate of the low-side secondary MOSFET is

connected to SDRV. The PCB trace connecting SDRV

to the gate must be of minimal length and appropriate

width to handle the high-peak drive current and fast

voltage transitions.

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