MCP19124 datasheet(13/236 Pages) MICROCHIP

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 2016 Microchip Technology Inc.

DS20005619A-page 13

MCP19124/5

2.0

PIN DESCRIPTION

The 24-lead MCP19124 and 28-lead MCP19125

devices feature pins that have multiple functions

associated with each pin. Table 2-1 provides a

description of the different functions. Refer to

Section 2.1 “Detailed Pin Functional Description”

for more information.

TABLE 2-1:

MCP19124/5 PINOUT DESCRIPTION

Name

Function

Input

Type

Output

Type

Description

GPA0/AN0/TEST_OUT

GPA0

TTL

CMOS General-purpose I/O

AN0

—

A/D Channel 0 input

TEST_OUT

—

Internal analog/digital signal multiplexer output (1)

GPA1/AN1/CLKPIN

GPA1

TTL

CMOS General-purpose I/O

AN1

—

A/D Channel 1 input

CLKPIN

CMOS Switching frequency clock input or output (2)

GPA2/AN2/T0CKI/INT

GPA2

CMOS General-purpose I/O

AN2

—

A/D Channel 2 input

T0CKI

—

Timer0 clock input

INT

—

External interrupt

GPA3/AN3

GPA3

TTL

CMOS General-purpose I/O

AN3

—

A/D Channel 3 input

GPA5/MCLR

GPA5

TTL

—

General-purpose input only

MCLR

—

Master Clear with internal pull-up

GPA6/CCD/ICSPDAT

GPA6

CMOS General-purpose I/O

ICSPDAT

CMOS Serial Programming Data I/O

CCD

CMOS Single Compare output. Dual Capture input

GPA7/SCL/ICSPCLK

GPA7

General-purpose open drain I/O

SCL

I2COD

I2C clock

ICSPCLK

—

Serial Programming Clock

GPB0/SDA

GPB0

TTL

General-purpose I/O

SDA

I2COD

I2C data input/output

GPB1/AN4/VREF2

GPB1

TTL

CMOS General-purpose I/O

AN4

—

A/D Channel 4 input

VREF2

—AN

VREF2 DAC Output (3)

GPB4/AN5/ICSPDAT

(MCP19125 Only)

GPB4

TTL

CMOS General-purpose I/O

AN5

—

A/D Channel 5 input

ICSPDAT

CMOS Primary Serial Programming Data I/O

GPB5/AN6/ICSPCLK

(MCP19125 Only)

GPB5

TTL

CMOS General-purpose I/O

AN6

—

A/D Channel 6 input

ISCPCLK

—

Primary Serial Programming Clock

Legend:

AN = Analog input or output

CMOS = CMOS compatible input or output

OD = Open-Drain

TTL = TTL compatible input

ST = Schmitt Trigger input with CMOS levels

I2C = Schmitt Trigger input with I2C

Note 1: The Analog/Digital Debug Output is selected through the control of the ABECON register.

Selected when functioning as master or slave by proper configuration of the MSC<1:0> bits in the MODECON register.

VREF2 output selected when configured as master by proper configuration of the MSC<1:0> bits in the MODECON

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