MCP19124 datasheet(78/236 Pages) MICROCHIP

78 / 236 page

MCP19124/5

DS20005619A-page 78

 2016 Microchip Technology Inc.

10.3.1

OPTION_REG REGISTER

The OPTION_REG register is a readable and writable

configure:

• Timer0/WDT prescaler

• External GPA2/INT interrupt

•Timer0

• Weak pull-ups on PORTGPA and PORTGPB

Note:

To achieve a 1:1 prescaler assignment for

Timer0, assign the prescaler to the WDT

by setting PSA bit to ‘1’ in the

OPTION_REG

Refer

Section 21.1.3 “Software Programma-

ble Prescaler”.

OPTION_REG: OPTION REGISTER

R/W-1

RAPU

INTEDG

T0CS

T0SE

PSA

PS2

PS1

PS0

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

x = Bit is unknown

‘0’

= Bit is cleared

‘1’

= Bit is set

bit 7

RAPU: Port GPx Pull-Up Enable bit (1)

= Port GPx pull-ups are disabled

= Port GPx pull-ups are enabled

bit 6

INTEDG: Interrupt Edge Select bit

= Interrupt on rising edge of INT pin

= Interrupt on falling edge of INT pin

bit 5

T0CS: TMR0 Clock Source Select bit

= Transition on T0CKI pin

= Internal instruction cycle clock

bit 4

T0SE: TMR0 Source Edge Select bit

= Increment on high-to-low transition on T0CKI pin

= Increment on low-to-high transition on T0CKI pin

bit 3

PSA: Prescaler Assignment bit

= Prescaler is assigned to WDT

= Prescaler is assigned to the Timer0 module

bit 2-0

PS<2:0>: Prescaler Rate Select bits

Note 1: Individual WPUx bit must also be enabled.

Bit Value

TMR0

Rate

WDT Rate

000

1: 2

1: 1

001

1: 4

1: 2

010

1: 8

1: 4

011

1: 16

1: 8

100

1: 32

1: 16

101

1: 64

1: 32

110

1: 128

1: 64

111

1: 256

1: 128

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