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MCP19124 Datasheet(PDF) 81 Page - Microchip Technology

Part # MCP19124
Description  Digitally-Enhanced Power Analog Synchronous Low-Side Dual-Loop PWM Controller
PDF  236 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MCP19124 Datasheet(HTML) 81 Page - Microchip Technology

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 2016 Microchip Technology Inc.
DS20005619A-page 81
MCP19124/5
11.0 DEVICE CONFIGURATION
Device Configuration consists of Configuration Word,
Code Protection and Device ID.
11.1
Configuration Word
There are several Configuration Word bits that allow
different timers to be enabled and allow memory
protection options. These are implemented as
Configuration Word at 2007h
.
Note:
The DBGEN bit in Configuration Word is
managed
automatically
by
device
development tools, including debuggers
and programmers. For normal device
operation, this bit should be maintained as
a '1'. Debug is available only on the
MCP19125.
REGISTER 11-1:
CONFIG: CONFIGURATION WORD
R/P-1
U-1
R/P-1
R/P-1
U-1
R/P-1
DBGEN
—
WRT1
WRT0
—BOREN
bit 13
bit 8
U-1
R/P-1
R/P-1
R/P-1
R/P-1
U-1
U-1
U-1
—CP
MCLRE
PWRTE
WDTE
—
—
—
bit 7
bit 0
Legend:
R = Readable bit
P = Programmable bit
U = Unimplemented bit, read as ‘1’
-n = Value at POR
‘1’
= Bit is set
‘0’
= Bit is cleared
x = Bit is unknown
bit 13
DBGEN: ICD Debug bit
1
= ICD debug mode disabled
0
= ICD debug mode enabled
bit 12
Unimplemented: Read as ‘1’
bit 11-10
WRT<1:0>: Flash Program Memory Self Write Enable bit
11
= Write protection off
10
= 000h to 3FFh write protected, 400h to FFFh may be modified by PMCON1 control
01
= 000h to 7FFh write protected, 800h to FFFh may be modified by PMCON1 control
00
= 000h to FFFh write protected, entire program memory is write protected.
bit 9
Unimplemented: Read as ‘1’
bit 8
BOREN: Brown-Out Reset Enable bit
1
= BOR disabled during Sleep and enabled during operation
0
= BOR disabled
bit 7
Unimplemented: Read as ‘1’
bit 6
CP: Code Protection
1
= Program memory is not code protected
0
= Program memory is external read and write protected
bit 5
MCLRE: MCLR Pin Function Select
1
=MCLR pin is MCLR function and weak internal pull-up is enabled
0
=MCLR pin is alternate function, MCLR function is internally disabled
bit 4
PWRTE: Power-Up Timer Enable bit (1)
1
= PWRT disabled
0
= PWRT enabled
bit 3
WDTE: Watchdog Timer Enable bit
1
= WDT enabled
0
= WDT disabled
bit 2-0
Unimplemented: Read as ‘1’
Note 1: Bit is reserved and not controlled by user.



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