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MCP19124 Datasheet(PDF) 49 Page - Microchip Technology |
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MCP19124 Datasheet(HTML) 49 Page - Microchip Technology |
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49 / 236 page ![]() 2016 Microchip Technology Inc. DS20005619A-page 49 MCP19124/5 6.10 VREF2 Voltage Reference The VREF2CON register controls a second reference DAC that can be used externally. For example, it can be sent off chip and used to set the current regulation set point for a MCP1631 Pulse-Width Modulator. The MCP19124/5 must be configured in Master Mode with bits MSC<0:1> = 01 in the MODECON register to connect VREF2 to GPB1. In Stand-Alone mode, VREF2 is not accessible. VREFCON2 holds the digital value used to set the VREF2 DAC. Since this reference is intended to go off chip, there is no pedestal offset associated with it and it is referenced to GND. It is an 8-bit linear DAC and has a range from 0V to 1.23V (BG) equating to 255 steps at 4.8 mV/step. 6.11 Analog Peripheral Control The MCP19124/5 have various analog peripherals. These peripherals can be configured to allow customizable operation. Refer to Register 6-13 for more information. 6.11.1 MOSFET GATE DRIVER ENABLES The MCP19124/5 can enable and/or disable the MOSFET gate driver outputs for the primary drive (PDRV) and the secondary drive (SDRV) independently. Setting the PDRVEN bit in the PE1 register enables the primary drive. Setting the SDRVEN bit in the PE1 register enables the secondary drive. Refer to Register 6-13 for details. REGISTER 6-12: VREF2CON: VREF2 VOLTAGE SET POINT REGISTER R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 VREF2<7:0> bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ u = Bit is unchanged x = Bit is unknown -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared bit 7-0 VREF2<7:0>: Voltage Controlling Current Regulation Set Point bits VREF2(V) = VBG x N/255 where N = the decimal value written to the VREF2CON Register VREF2<7:0> from 0 to 255. REGISTER 6-13: PE1: ANALOG PERIPHERAL ENABLE1 CONTROL REGISTER R/W-0 R/W-0 R/W-0 R/W-0 U-0 R/W-0 R/W-0 R/W-0 PDRVEN SDRVEN PDRVBY SDRVBY — ISPUEN PWMSTR_PEN PWMSTR_SEN bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ u = Bit is unchanged x = Bit is unknown -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared bit 7 PDRVEN: PDRV Gate Drive Enable bit 1 = PDRV gate drive is enabled 0 = PDRV gate drive is disabled |
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