AT49LW080 datasheet(5/34 Pages) ATMEL

5 / 34 page

AT49LW080/040

1966C–FLASH–03/02

I/O0 - I/O7

I/O

DATA INPUT/OUTPUTS: These pins receive data and commands during

write cycles and transmit data during memory array and identifier code

read cycles. Data pins float to high-impedance when the chip is

deselected or outputs are disabled. Data is internally latched during a

write cycle.

INPUT

OUTPUT ENABLE: Gates the device’s outputs during a read cycle.

R/C

INPUT

ROW-COLUMN ADDRESS SELECT: For the A/A Mux interface, this pin

determines whether the address pins are pointing to the row addresses,

A0 - A10, or to the column addresses, A11 - A18 (AT49LW040) or

A11 - A19 (AT49LW080).

INPUT

WRITE ENABLE: Controls writes to the array sectors. Addresses and

data are latched on the rising edge of the WE pulse.

VPP

SUPPLY

SECTOR ERASE/PROGRAM POWER SUPPLY: For erasing array

sectors or programming data. V

PP = 3.3V or 12V. With VPP ≤ VPPLK,

memory contents cannot be altered. Sector erase or program with an

invalid V

PP (see DC Characteristics) produces spurious results and

should not be attempted. VPP may only be held at 12V for 80 hours over

the lifetime of the device.

VCC

SUPPLY

DEVICE POWER SUPPLY: Internal detection automatically configures

the device for optimized read performance. Do no float any power pins.

With V

CC ≤ VLKO, all write attempts to the flash memory are inhibited.

Device operations at invalid V

CC voltages (see DC Characteristics)

produce spurious results and should not be attempted.

GND

SUPPLY

GROUND: Do not float any ground pins.

VCCa

SUPPLY

ANALOG POWER SUPPLY: This supply should share the same system

supply as VCC.

GNDa

SUPPLY

ANALOG GROUND: Should be tied to same plane as GND.

RFU

RESERVED FOR FUTURE USE: These pins are reserved for future

generations of this product and should be connected accordingly. These

pins may be left disconnected or driven. If they are driven, the voltage

levels should meet VIH and VIL requirements.

A/A Mux = I/O[7:4]

NO CONNECT: Pin may be driven or floated. If it is driven, the voltage

levels should meet VIH and VIL. No connects appear only on the 40-lead

TSOP package.

RY/BY

OUTPUT

READY/BUSY: Valid only in A/A Mux Mode. This output pin is a reflection

of bit 7 in the status register. This pin is used to determine sector erase or

program completion.

Table 1. Pin Description (Continued)

Symbol

Type

Interface

Name and Function

FWH

A/A Mux

AT49LW080 Datasheet(PDF) 5 Page - ATMEL Corporation

AT49LW080 Datasheet(HTML) 5 Page - ATMEL Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34

Datasheet Download

Link URL