IR3092 datasheet(4/37 Pages) IRF

4 / 37 page

IR3092

Page 4 of 37

06/25/04

ELECTRICAL SPECIFICATIONS

Unless otherwise specified, these specifications apply over: 7.3V

21V, 4V V

CCL

14V,

CCHX

28V, C

GATEHX =3.3nF, CGATELX =6.8nF, 0

125oC

PARAMETER

TEST CONDITION

MIN

TYP

MAX

UNIT

VDAC Reference

System Set-Point Accuracy

-0.3V

92616- 9 &RQQHFW )% WR

EAOUT, Measure V(EAOUT) –

V(VOSNS-) deviation from Table 1.

Applies to all VID codes.

0.5

Source Current

RROSC = 42k

9'$& 2&6(7

Sink Current

RROSC = 42k

9'$& 2&6(7

VID Input Threshold, INTEL

VID_SEL=0, Referenced to VOSNS-

0.4

0.6

0.8

VID Input Threshold, AMD

VID_SEL=Float, Referenced to

VOSNS-

1.3

1.5

1.7

VID_SEL OPTERON

Threshold

1.0

1.2

1.4

VID_SEL ATHLON Threshold

3.0

3.4

3.8

VID_SEL Float Voltage

Tracks ATHLON threshold

2.1

2.6

3.2

VID_SEL Pull-up Resistance

V(VID_SEL)<2.1V

100

VID_SEL Pull-down

Resistance

V(VID_SEL)>3.2V

190

375

VID Pull-up Current

VID0-5 = 1V

VID Float Voltage

Referenced to LGND

4.5

4.9

5.2

VID = 11111 Fault Blanking

Delay to PWRGD assertion

0.5

1.7

4.1

Error Amplifier

Input Offset Voltage

Connect FB to EAOUT, Measure

V(EAOUT)-V(VDAC). From Table 1.

Applies to all VID codes and -0.3V

VOSNS-

9 1RWH

-5

-1

FB Bias Current

RROSC = 42k

30.5

DC Gain

Note 1

100

105

Gain-Bandwidth Product

Note 1

MHz

Slew Rate

Note 1, 50mV FB signal

1.25

Source Current

280

380

500

Sink Current

.75

1.0

1.5

Max Voltage

4.5

4.9

5.3

Min Voltage

150

VDRP Buffer Amplifier

Positioning Offset Voltage

V(VDRP) – V(VDAC) with

CSINMX=CSINPX=0, Note 1.

-125

125

Output Voltage Range

0.2

3.75

Source Current

Sink Current

200

280

400

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