IR3092 datasheet(7/37 Pages) IRF

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IR3092

Page 7 of 37

06/25/04

Note 1: Guaranteed by design, but not tested in production

Note 2: VDAC Output is trimmed to compensate for Error Amp input offsets errors

PARAMETER

TEST CONDITION

MIN

TYP

MAX

UNIT

Share Adjust Error Amplifier

Input Offset Voltage

Note 1

-5

MAX Duty Cycle Adjust Ratio

Duty Cycle of GATEH2 to GATEH1

1.5

%/%

MIN Duty Cycle Adjust Ratio

Duty Cycle of GATEH2 to GATEH1

0.6

0.5

0.4

%/%

Transconductance

Note 1

100

200

300

PA/V

SCOMP Source/Sink Current

Equal Duty Cycle Comparator

Threshold

0.45

0.7

0.85

Duty Cycle Match at Startup

DTC GATEH1 – DTC GATEH2

-5

SCOMP Precharge Current

V(SS/DEL)=0

250

420

600

0% Duty Cycle Comparator

Threshold Voltage

(Internal Ramp1 Start Voltage) – (0DC

Threshold)

100

150

200

Propagation Delay

VCCL = 12V. Step EAOUT from .8V to

.3V and measure time to GATELX

transition to < 11V.

200

320

Body Braking Disable

Comparator Threshold

Compare V(FB) to V(VDAC)

110

OVP

VR10 Comparator Threshold

VID_SEL=0V. Compare to V(VDAC)

120

145

180

AMD Comparator Threshold

Float VID_SEL. Compare to V(VDAC)

360

480

600

Propagation Delay

VCCL = 12V. V(EAOUT)=0V. Step FB

460mV above V(VDAC). Measure time

to GATELX transition to >1V.

200

300

Source Current

Pull Down Resistance

OVP to PGND1

High Voltage

I(OVP)=10mA, V(VCC)-V(OVP)

1.2

1.6

General

VCC Supply Current

VOSNS- Current

-0.3V

VOSNS- 0.3V, All VID Codes

VCCHX Supply Current (12V)

VCCHX Supply Current (28V)

VCCL Supply Current

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