IRCC datasheet(30/79 Pages) SMSC

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Table 16 - SCE Modes

MODE DESCRIPTION

Receive/Transmit Disabled (default)

Transmit Mode

Receive Mode

Undefined

Transmit Mode

Transmit mode enables the SCE IrDA FIR and

Consumer IR transmitters whenever TC goes

active, or the FIFO THRESHOLD has been

exceeded.

In Transmit mode, the SCE FIFO

input is connected to the Host System Data Bus

and the FIFO output is connected to the SCE

transmitter input.

Transmit mode is strictly

software controlled when the IrDA FIR encoders

are active. The Consumer IR encoder will reset

Transmit mode in hardware following the rising

edge of nActive Frame following a FIFO

underrun.

Receive Mode

Receive mode enables the SCE IrDA FIR and

Consumer IR receivers. In Receive mode, the

SCE FIFO output

is connected to the Host

System Data Bus, the FIFO input is connected to

the SCE receiver output.

Receive mode is

strictly software controlled when the IrDA FIR

encoders are active. The Consumer IR encoder

will reset Receive mode in hardware following the

rising edge of nActive Frame following a FIFO

underrun or TC.

SIP Enable, bit 5

If the SIP Enable is one, an SIR Interaction Pulse

occurs every 500ms if an IrDA FIR mode has

been selected and the transmitter or receiver is

not otherwise engaged.

Brick Wall, bit 4

When the Brick Wall bit is active the IrCC sends

back-to-back IrDA FIR frames separated by the

number of additional flags specified in the brick

wall count register. NOTE: BOF counts do not

apply during brick walled messages. The Data

Size register can also be used when the Brick

Wall bit is active to send back-to-back IrDA FIR

frames when the DMA data block is larger than

the IrDA message length. In this case, if the

maximum number of data bytes according to the

data size register have been transferred and the

DMA terminal count or the FIFO Empty flags

have not been activated the next message is

brick walled to the previous message (Table 17).

The Brick Wall bit is software controlled only.

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