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IRCC Datasheet(PDF) 77 Page - SMSC Corporation

Part # IRCC
Description  INFRARED COMMUNICATIONS CONTROLLER
PDF  79 Pages
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Manufacturer  SMSC [SMSC Corporation]
Direct Link  http://www.smsc.com
Logo SMSC - SMSC Corporation

IRCC Datasheet(HTML) 77 Page - SMSC Corporation

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77
CHIP-LEVEL IrCC ADDRESSING SUPPORT
IrCC Register addressing is controlled at the chip
level. Both the ACE bank select, nACE, and the
SCE bank select, nSCE, are decoded at the chip
level from the Host Address Bus to access data
in the IrCC register banks (Figure 50). Table 33
illustrates a chip-level IrCC address decoder
using a base address of 2F8 for the ACE UART
and 2F8+400 or 6F8 for the SCE registers.
Table 33 - IrCC Address Decode at '400'hex
HEX ADDRESS
NACE
NSCE
DESCRIPTION
2F8 - 2FF
0
1
ACE UART registers enabled
6F8 - 6FF
1
0
SCE registers enabled
All other registers
1
1
IrCC registers not accessible
Chip-Level
Address
Decoder
ACE
Select
SCE
Select
Address Bus
AEN
I/O Select
nACE
nSCE
IrCC
FIGURE 50 - CHIP-LEVEL IrCC ADDRESS DECODE



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