IRCC datasheet(36/79 Pages) SMSC

36 / 79 page

(TV Remote) encoder/decoder configuration

registers (Table 24).

Table 24 - Register Block Two

Address

Direction

Description

Default

R/W

Consumer IR (TV Remote) Control Register

'00'hex

sync

bit

carrier

off

carrier range

bits

R/W

Consumer IR Carrier Rate Register

'29'hex

R/W

Consumer IR Bit Rate Register

'37'hex

Consumer IR Control Register (Address 0)

Sync Bit, bit 7

The Sync Bit enables the receiver bit-rate clock

synchronization mechanisim. When the Sync bit

is one, receiver edge synchronization is enabled.

Carrier Off, bit 2

The Carrier Off bit bypasses the Consumer IR

Carrier generator/receiver. When the Carrier Off

bit is one, the transmitter outputs a non-

modulated SCE NRZ serial data stream at the

programmed bit rate. Also, when the Carrier Off

bit is one, the receiver does not attempt to

demodulate a carrier from the incoming data

stream and samples the state of the PIN diode at

the programmed bit rate.

Carrier Range, bits 0 - 1

The Consumer IR Carrier Range Bits set the

carrier detect sensitivity of the receiver.

The

effects of this register are shown in Table 11 -

Receive Carrier Sense Range.

Consumer IR Carrier Rate Register

(Address 1)

The

Consumer

Carrier

Rate

programs the ASK carrier frequency divider. The

effects of this register are shown in Table 9-

Representative Carrier Frequencies.

Consumer IR Bit Rate Register (Address2)

The Consumer IR Bit Rate Register programs

the transmit and receive bit-rate divider.

The

effects of this register are shown in Table 10 -

Representative Bit Rates.

IRCC Datasheet(PDF) 36 Page - SMSC Corporation

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