IRCC datasheet(34/79 Pages) SMSC

34 / 79 page

SCE Configuration Register B (Address 1)

Output Mux, bits 7 - 6

The Output Mux bits select the Output

Multiplexer port for the active encoder/decoder

(Table 21). Inactive outputs depend on the state

of the Tx Polarity bit when the Output Mux bits

are both high, otherwise inactive outputs are

always low. The Output Mux bits are equivalent

to the 93X IR Option Register bits 6-7. The IR

Location Mux, bit 6, in the 93X IR Option

7 (Reserved) in the 93X IR Option Register is

equivalent to Output Mux bit, D7.

Provisions

have

been

made

legacy

devices

accommodate Output Multiplexer port selection

through

either

the

chip-level

configuration

registers or the Output Mux bits; i.e., the last

write from either source determines the current

port selection and is visible in both registers.

Table 21 - IrCC Output Multiplexer

MUX. MODE

Active Device to COM Port (default)

Active Device to IR Port

Active Device to AUX Port

Outputs Inactive

Loopback, bit 5

The Loopback bit configures the FIFO and

enables the transmitter/receiver for loopback

testing. The SCE MODES bits must be set to

zero before activating the Loopback bit. When

the Loopback bit is one, the SCE enters a full-

duplex mode with internal loopback capability for

testing. The CRC generator can be selectively

reconfigured for either transmit or receive. The

128-byte FIFO input is connected to the SCE

receiver output, the FIFO output is connected to

the SCE transmit input. For IrDA FIR loopback

tests the Loopback bit must be set to zero to exit

loopback mode. Consumer IR loopback tests

reset the Loopback bit automatically when the Rx

Data Size register reaches zero.

Provisions

must be made following loopback tests in all

modes to verify the Rx message data in the

FIFO.

Loopback Transmit CRC, bit 4

When the Loopback Transmit CRC bit is set to

one, the CRC generator is used by the

transmitter during loopback testing regardless of

the state of the CRC Select bit. Otherwise, the

CRC generator is connected to the receiver

(Table 22).

Table 22 - Hardware CRC Programming

LOOPBACK

BIT

CRC

SELECT

LOOPBACK TX

CRC BIT

HARDWARE DESCRIPTION

No CRC Generation, No CRC Checking

CRC Generation., CRC Checking

No CRC Generation, No CRC Checking

CRC Generation, No CRC Checking

CRC Checking, No CRC Generation

CRC Generation, No CRC Checking

IRCC Datasheet(PDF) 34 Page - SMSC Corporation

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