PI7C7300 datasheet(38/109 Pages) PERICOM

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PI7C7300A

3-PORT PCI-TO-PCI BRIDGE

ADVANCE INFORMATION

Page 38 OF 109

09/25/03 Revision 1.09

4.9.3.3

DELAYED READ TARGET TERMINATION RESPONSE

When PI7C7300A initiates a delayed read transaction, the abnormal target responses can

be passed back to the initiator. Other target responses depend on how much data the

initiator requests. Table 4-9 shows the response to each type of target termination that

occurs during a delayed read transaction.

PI7C7300A repeats a delayed read transaction until one of the following conditions is

met:

PI7C7300A completes at least one data transfer.

PI7C7300A receives a master abort.

PI7C7300A receives a target abort.

PI7C7300A makes 224 (default) read attempts resulting in a response of target retry.

Table 4-9 RESPONSE TO DELAYED READ TARGET TERMINATION

Target Termination

Response

Normal

If prefetchable, target disconnect only if initiator requests more data than read

from target. If non-prefetchable, target disconnect on first data phase.

Target Retry

Re-initiate read transaction to target

Target Disconnect

If initiator requests more data than read from target, return target disconnect to

initiator.

Target Abort

Return target abort to initiator. Set received target abort bit in the target

interface status register. Set signaled target abort bit in the initiator interface

status register.

After PI7C7300A makes 224(default) attempts of the same delayed read transaction on

the target bus, PI7C7300A asserts P_SERR# if the primary SERR# enable bit is set (bit 8

of command register for secondary bus S1 or S2) and the delayed-write-non-delivery bit

is not set. The delayed-write-non-delivery bit is bit 5 of P_SERR# event disable register

(offset 64h). PI7C7300A will report system error. See Section 7.4 for a description of

system error conditions.

4.9.4

TARGET TERMINATION INITIATED BY PI7C7300A

PI7C7300A can return a target retry, target disconnect, or target abort to an initiator for

reasons other than detection of that condition at the target interface.

4.9.4.1

TARGET RETRY

PI7C7300A returns a target retry to the initiator when it cannot accept write data or

return read data as a result of internal conditions. PI7C7300A returns a target retry to an

initiator when any of the following conditions is met:

For delayed write transactions:

The transaction is being entered into the delayed transaction queue.

Transaction has already been entered into delayed transaction queue, but target

response has not yet been received.

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