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DM505 Datasheet(PDF) 153 Page - Texas Instruments

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Part # DM505
Description  SoC for Vision Analytics 15mm Package (ABF) Silicon Revision 2.0
PDF  290 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

DM505 Datasheet(HTML) 153 Page - Texas Instruments

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cs
sclk
d[0]
d[3:1]
Bit n-1
Bit n-2
Bit 1
Bit 0
PHA=0
POL=0
Command
Command
Write Data
Write Data
Q4
Q7
Q2
Q3
Q1
Q6
Q6
Q5
SPRS85v_TIMING_OSPI1_04
Q8
Q9
Q6
153
DM505
www.ti.com
SPRS976D – NOVEMBER 2016 – REVISED JULY 2017
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Specifications
Copyright © 2016–2017, Texas Instruments Incorporated
Figure 5-42. QSPI Write (Clock Mode 0)
NOTE
To configure the desired virtual mode the user must set MODESELECT bit and
DELAYMODE bitfield for each corresponding pad control register.
The pad control registers are presented in Table 4-28 and described in Device TRM, Control
Module section.
CAUTION
The IO timings provided in this section are only valid if signals within a single
IOSET are used. The IOSETs are defined in Table 5-51.
In Table 5-51 are presented the specific groupings of signals (IOSET) for use with QSPI.
Table 5-51. QSPI IOSETs
SIGNALS
IOSET1
IOSET2
IOSET3
IOSET4
BALL
MUX
BALL
MUX
BALL
MUX
BALL
MUX
qspi1_sclk
C8
1
C8
1
C8
1
C8
1
qspi1_rtclk
C14
8
B7
1
F13
5
D8
2
qspi1_d0
B9
1
B9
1
B9
1
B9
1
qspi1_d1
F10
1
F10
1
F10
1
F10
1
qspi1_d2
A9
1
A9
1
A9
1
A9
1
qspi1_d3
D10
1
D10
1
D10
1
D10
1
qspi1_cs0
E10
1
E10
1
E10
1
E10
1
qspi1_cs1
F15
5



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