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ADT7312 Datasheet(PDF) 7 Page - Analog Devices |
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ADT7312 Datasheet(HTML) 7 Page - Analog Devices |
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7 / 25 page ![]() ADT7312 Data Sheet | Page 6 of 24 PAD CONFIGURATION AND FUNCTION DESCRIPTIONS 1950µm 2350µm VDD VDD GND GND CT INT DIN DOUT SCLK CS Figure 3. Metallization Picture Table 4. Pad Function Descriptions Pad No. Pad Name Description 1 SCLK Serial Clock Input. The serial clock is used to clock data into and out of any register of the device. 2 DOUT Serial Data Output. Data is clocked out on the falling edge of SCLK and is valid on the rising edge of SCLK. 3 DIN Serial Data Input. Data to be loaded into the control registers of the part is provided on this input. Data is clocked into the registers on the rising edge of SCLK. 4 CS Chip Select Input. The device is enabled when this pin is low. The device is disabled when this pin is high. 5 INT Overtemperature and Undertemperature Indicator. Logic output. When the device is powered up, this output is an active low interrupt by default. Open-drain configuration. A pull-up resistor is required, typically 10 kΩ. 6 CT Critical Overtemperature Indicator. Logic output. The default power-on polarity is active low. Open-drain configuration. A pull-up resistor is required, typically 10 kΩ. 7 GND Analog Ground. This pad must be connected directly to Pad 8 (digital ground). 8 GND Digital Ground. This pad must be connected directly to Pad 7 (analog ground). 9 VDD Analog Supply Voltage (2.7 V to 5.5 V). This pad must be connected directly to Pad 10 (digital supply voltage). The supply should be decoupled with a 0.1 μF ceramic capacitor to GND. 10 VDD Digital Supply Voltage (2.7 V to 5.5 V). This pad must be connected directly to Pad 9 (analog supply voltage). The supply should be decoupled with a 0.1 μF ceramic capacitor to GND. Rev. A |
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