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ADT7312 Datasheet(PDF) 17 Page - Analog Devices

Part # ADT7312
Description  Digital SPI Temperature Sensor in Die Form
PDF  25 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADT7312 Datasheet(HTML) 17 Page - Analog Devices

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ADT7312
Data Sheet
| Page 16 of 24
THYST SETPOINT REGISTER
The 8-bit, read/write THYST setpoint register (Register Address 0x05)
stores the temperature hysteresis value for the THIGH, TLOW, and
TCRIT temperature limits. The temperature hysteresis value is
stored in straight binary format using the four LSBs. Each LSB
increments the hysteresis value in steps of 1°C from 0°C to 15°C.
To implement hysteresis, the value in this register is subtracted
from the THIGH and TCRIT values and is added to the TLOW value.
The default setting for the THYST setpoint is +5°C.
THIGH SETPOINT REGISTER
The 16-bit, read/write THIGH setpoint register (Register
Address 0x06) stores the overtemperature limit value. An
overtemperature event occurs when the temperature value
stored in the temperature value register exceeds the value
stored in this register. The INT pin is activated if an over-
temperature event occurs. The temperature is stored in twos
complement format; the MSB is the temperature sign bit.
The default setting for the THIGH setpoint is +64°C.
TLOW SETPOINT REGISTER
The 16-bit, read/write TLOW setpoint register (Register
Address 0x07) stores the undertemperature limit value. An
undertemperature event occurs when the temperature value
stored in the temperature value register is less than the value
stored in this register. The INT pin is activated if an under-
temperature event occurs. The temperature is stored in twos
complement format; the MSB is the temperature sign bit.
The default setting for the TLOW setpoint is +10°C.
Table 13. THYST Setpoint Register (Register Address 0x05)
Bits
Default Value
Type
Name
Description
[7:4]
0000
R/W
Unused
Not used.
[3:0]
0101
R/W
THYST
Hysteresis value, from 0°C to +15°C, stored in straight binary format. The default
setting is +5°C.
Table 14. THIGH Setpoint Register (Register Address 0x06)
Bits
Default Value
Type
Name
Description
[15:0]
0x2000
R/W
THIGH
16-bit overtemperature limit, stored in twos complement format. The default
setting is +64°C.
Table 15. TLOW Setpoint Register (Register Address 0x07)
Bits
Default Value
Type
Name
Description
[15:0]
0x0500
R/W
TLOW
16-bit undertemperature limit, stored in twos complement format. The default
setting is +10°C.
Rev. A



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