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ADT7312 Datasheet(PDF) 18 Page - Analog Devices |
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ADT7312 Datasheet(HTML) 18 Page - Analog Devices |
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18 / 25 page ![]() Data Sheet ADT7312 | Page 17 of 24 SERIAL INTERFACE ADT7312 GND SCLK DOUT DIN CT INT VDD 10kΩ 10kΩ PULL-UP TO VDD 0.1µF MICROCONTROLLER VDD CS Figure 13. Typical SPI Interface Connection The ADT7312 has a 4-wire serial peripheral interface (SPI). The interface has a data input pin (DIN) for writing data to the device, a data output pin (DOUT) for reading data back from the device, and a data clock pin (SCLK) for clocking data into and out of the device. A chip select pin (CS) enables or disables the ADT7312. CS is required for correct operation of the serial interface. Data is clocked out of the ADT7312 on the falling edge of SCLK; data is clocked into the device on the rising edge of SCLK. SPI COMMAND BYTE All data transactions on the bus begin with the master taking CS from high to low and sending out the command byte. The command byte indicates to the ADT7312 whether the transaction is a read or a write and provides the address of the register for the data transfer. Table 16 shows the command byte. Table 16. Command Byte C7 C6 C5 C4 C3 C2 C1 C0 0 R/W Register address 0 0 0 Bit C7, Bit C2, Bit C1, and Bit C0 of the command byte must all be set to 0 to successfully begin a bus transaction. The SPI inter- face does not work correctly if a 1 is written to any of these bits. Bit C6 is the read/write bit: 1 indicates a read, and 0 indicates a write. Bits[C5:C3] contain the target register address. One register can be read from or written to per bus transaction. Rev. A |
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