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LAN9220 Datasheet(PDF) 107 Page - Microchip Technology |
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LAN9220 Datasheet(HTML) 107 Page - Microchip Technology |
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107 / 142 page ![]() 2006-2017 Microchip Technology Inc. DS00002417A-page 107 LAN9220 5.5.4 PHY IDENTIFIER 2 5.5.5 AUTO-NEGOTIATION ADVERTISEMENT Note 5-2 When both symmetric PAUSE and asymmetric PAUSE support are advertised (value of 11), the device will only be configured to, at most, one of the two settings upon auto-negotiation completion. Index (In Decimal): 3 Size: 16-bits Bits Description Type Default 15-10 PHY ID Number Assigned to the 19th through 24th bits of the OUI. RO 0xC0C3h 9 - 4 Model Number. Six-bit manufacturer’s model number. RO 3 - 0 Revision Number. Four-bit manufacturer’s revision number. RO Index (In Decimal): 4 Size: 16-bits Bits Description Type Default 15:14 Reserved RO 00 13 Remote Fault. 1 = remote fault detected, 0 = no remote fault R/W 0 12 Reserved R/W 0 11:10 Pause Operation. (See Note 5-2) 00 No PAUSE 01 Symmetric PAUSE 10 Asymmetric PAUSE 11 Advertise support for both Symmetric PAUSE and Asymmetric PAUSE R/W 00 9 Reserved RO 0 8 100Base-TX Full Duplex. 1 = TX with full duplex, 0 = no TX full duplex ability R/W 1 7 100Base-TX. 1 = TX able, 0 = no TX ability R/W 1 6 10Base-T Full Duplex. 1 = 10Mbps with full duplex 0 = no 10Mbps with full duplex ability R/W 1 5 10Base-T. 1 = 10Mbps able, 0 = no 10Mbps ability R/W 1 4:0 Selector Field. [00001] = IEEE 802.3 R/W 00001 |
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