ADAS1000 datasheet(48/80 Pages) AD

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ADAS1000/ADAS1000-1/ADAS1000-2

Data Sheet

Common Mode

The ADAS1000/ADAS1000-1 have a dedicated CM_OUT pin

serving as an output and a CM_IN pin as an input. In gang

mode, the master device determines the common-mode voltage

based on the selected input electrodes. This common-mode

signal (on CM_OUT) can then be used by subsequent slave

devices (applied to CM_IN) as the common-mode reference.

All electrodes within the slave device are then measured with

respect to the CM_IN signal from the master device. See the

CMREFCTL register in Table 32 for more details on the control

via the serial interface. Figure 77 shows the connections

between a master and slave device using multiple

ADAS1000/ADAS1000-2 devices.

Right Leg Drive

The right leg drive comes from the master device. If the internal

RLD resistors of the slave device are to contribute to the RLD

loop, tie the RLD_SJ pins of master and slave together.

Sequencing Devices into Gang Mode

When entering gang mode with multiple devices, both

devices can be configured for operation, but the conversion

enable bit (ECGCTL register, Bit 2, Table 28) of the master

device should be set after the conversion enable bit of the

slave device. When the master device conversion signal is set,

the master device generates one edge on its SYNC_GANG

pin. This applies to any slave SYNC_GANG inputs, allowing

the devices to synchronize ADC conversions.

Figure 77. Configuring Multiple Devices to Extend Number of Electrodes/Leads

(This Example Uses ADAS1000 as Master and ADAS1000-2 as Slave. Similarly the ADAS1000-1 Could be Used as Master.)

SYNC_GANG

TAKE LEAD

DATA

TAKE

ELECTRODE

DATA

ELECTRODES

×5

VREF

REFOUT

REFIN

CAL_DAC_IO

AMP

ADC

RESPIRATION PATH

MUXES

LEAD-OFF

DAC

ADC

5 × ECG PATH

FILTERS,

CONTROL,

AND

INTERFACE

LOGIC

PACE

DETECTION

SCLK

SDI

SDO

DRDY

LEAD-OFF

DETECTION

COMMON-

MODE AMP

DRIVEN

LEAD AMP

SHIELD

DRIVE

AMP

SHIELD

RLD_OUT

CM_IN

XTAL1

XTAL2

IOVDD

CLOCK GEN/OSC/

EXTERNAL CLK

SOURCE

EXT RESP_LA

EXT RESP LL

VCM_REF

(1.3V)

CLK_IO

AVDD

ADCVDD

DVDD

EXT RESP_RA

CM_OUT/

WCT

LEAD-OFF

DAC

10kΩ

ADCVDD, DVDD

1.8V

REGULATORS

(optional)

ADAS1000

CAL_DAC_IN

CM_IN

SYNC_GANG

ELECTRODES

×5

AMP

MUXES

ADC

5 × ECG PATH

FILTERS,

CONTROL,

AND

INTERFACE

LOGIC

PACE

DETECTION

SCLK

SDI

SDO

DRDY

LEAD-OFF

DETECTION

COMMON-

MODE AMP

RLD_SJ

IOVDD

CLOCK GEN/OSC/

EXTERNAL CLK

SOURCE

VCM_REF

(1.3V)

CLK_IO

AVDD

ADCVDD

DVDD

ADCVDD, DVDD

1.8V

REGULATORS

(optional)

ADAS1000-2

SLAVE

CALIBRATION

DAC

RESPIRATION

DAC

VREF

REFOUT

REFIN

Rev. B | Page 48 of 80

ADAS1000 Datasheet(PDF) 48 Page - Analog Devices

ADAS1000 Datasheet(HTML) 48 Page - Analog Devices

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