ADAS1000 datasheet(70/80 Pages) AD

70 / 80 page

ADAS1000/ADAS1000-1/ADAS1000-2

Data Sheet

Table 49. Operating State Register (OPSTAT) Address 0x1F, Reset Value = 0x0000001

R/W

Default

Bit

Name

Function

[23:4]

Reserved

Reserved.

Internal error

Internal digital failure. This is set if an error is detected in the digital core.

Configuration status

This bit is set after a reset indicating that the configuration has not been read yet.

Once the configuration is set, this bit is ready.

0 = ready.

1 = busy.

PLL lock

PLL lock lost. This bit is set if the internal PLL loses lock after it is enabled and locked.

This bit is cleared once this register is read or the PWREN bit (Address 0x01[1]) is cleared.

0 = PLL locked.

1 = PLL lost lock.

PLL locked status

This bit indicates the current state of the PLL locked status.

0 = PLL not locked.

1 = PLL locked.

This register is not part of framing data, but can be read by issuing a register read command of this address. This register assists support efforts giving insight into

potential areas of malfunction within a failing device.

Table 50. Extended Switch for Respiration Inputs Register (EXTENDSW) Address 0x20, Reset Value = 0x000000

R/W

Default

Bit

Name

Switch

Function

R/W

EXT_RESP_RA to ECG1_LA

SW1a

External respiration electrode input switch to channel electrode input (see

Figure 72).1

EXT_RESP_RA to ECG2_LL

SW1b

EXT_RESP_RA to ECG3_RA

SW1c

0 = switch open.

EXT_RESP_RA to ECG4_V1

SW1d

1 = switch closed.

EXT_RESP_RA to ECG5_V2

SW1e

EXT_RESP_LL to ECG1_LA

SW2a

EXT_RESP_LL to ECG2_LL

SW2b

EXT_RESP_LL to ECG3_RA

SW2c

EXT_RESP_LL to ECG4_V1

SW2d

EXT_RESP_LL to ECG5_V2

SW2e

EXT_RESP_LA to ECG1_LA

SW3a

EXT_RESP_LA to ECG2_LL

SW3b

EXT_RESP_LA to ECG3_RA

SW3c

EXT_RESP_LA to ECG4_V1

SW3d

EXT_RESP_LA to ECG5_V2

SW3e

R/W

AUX_V1

V1 and V2 electrodes can be used for measurement purposes other than ECG.

R/W

AUX_V2

To achieve this, they must be disconnected from the patient VCM voltage

provided from the internal common-mode buffer and, instead, connected to

the internal VCM_REF level of 1.3 V.

Setting the AUX_Vx bits high connects the negative input of the V1 and V2

channel amplifier to internal VCM_REF level. This allows the user to make

alternative measurements on V1 and V2 relative to the VCM_REF level.

Note that the V1 and V2 measurements are now being made outside of the

right leg drive loop, therefore there is increased noise on the measurement

as a result.

R/W

[6:0]

Reserved

Reserved, set to 0.

ADAS1000 model only, ADAS1000-1/ADAS1000-2 models do not contain these EXT_RESP_xx pins.

Rev. B | Page 70 of 80

ADAS1000 Datasheet(PDF) 70 Page - Analog Devices

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