ADAS1000 datasheet(64/80 Pages) AD

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ADAS1000/ADAS1000-1/ADAS1000-2

Data Sheet

Table 36. Calibration DAC Register (CALDAC) Address 0x09, Reset Value = 0x0020001

R/W

Default

Bit

Name

Function

[23:14]

Reserved

Reserved, set to 0.

R/W

CALCHPEN

Calibration chop clock enable. The calibration DAC output (CAL_DAC_IO) can be

chopped to lower 1/f noise. Chopping is performed at 256 kHz.

0 = disabled.

1 (default) = enabled.

R/W

CALMODEEN

Calibration mode enable.

0 (default) = disable calibration mode.

1 = enable calibration mode; connect CAL DAC_IO, begin data acquisition on ECG channels.

R/W

CALINT

Calibration internal or external.

0 (default) = external calibration to be performed externally by looping CAL_DAC_IO

around into ECG channels.

1 = internal calibration; disconnects external switches for all ECG channels and

connects calibration DAC signal internally to all ECG channels.

R/W

CALDACEN

Enable 10-bit calibration DAC for calibration mode or external use.

0 (default) = disable calibration DAC.

1 = enable calibration DAC. If a master device and not in calibration mode, also connects

the calibration DAC signal out to the CAL_DAC_IO pin for external use. If in slave mode,

the calibration DAC is disabled to allow master to drive the slave CAL_DAC_IO pin. When

the calibration DAC is enabled, ac lead-off is disabled.

R/W

0000000000

[9:0]

CALDATA[9:0]

Set the calibration DAC value.

To ensure successful update of the calibration DAC, the serial interface must issue four additional SCLK cycles after writing the new calibration DAC register word.

Rev. B | Page 64 of 80

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