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ADAS1000 Datasheet(PDF) 53 Page - Analog Devices

Part # ADAS1000
Description  Low Power, Five Electrode Electrocardiogram (ECG) Analog Front End
PDF  80 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADAS1000 Datasheet(HTML) 53 Page - Analog Devices

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Data Sheet
ADAS1000/ADAS1000-1/ADAS1000-2
CRC Word
Framed data integrity is provided by CRCs. For the 128 kHz
frame rates, the 16-bit CRC-CCITT polynomial is used. For the
2 kHz and 16 kHz frame rates, the 24-bit CRC polynomial used.
In both cases, the CRC residue is preset to all 1s and inverted
before being transmitted. The CRC parameters are summarized
in Table 24. To verify that data is correctly received, software
computes a CRC on both the data and the received checksum. If
data and checksum are received correctly, the resulting CRC
residue equals the check constant shown in Table 24. Note that
data is shifted through the generator polynomial MSB first, the
same order that it is shifted out serially. The bit and byte order
of the CRC that is appended to the frame is such that the MSB
of the CRC is shifted through the generator polynomial first in
the same order as the data so that the CRC residue XOR’d with
the inverted CRC at the end of the frame is all 1s, which is why
the check constant is identical for all messages. The CRC is
based only on the data that is sent out.
Figure 80. Input Clock
Clocks
The ADAS1000/ADAS1000-1/ADAS1000-2 run from an
external crystal or clock input frequency of 8.192 MHz.
The external clock input is provided for use in gang mode
so conversions between the two devices are synchronized.
In this mode, the CLK_IO pin is an output from the master
and an input from the slave. To reduce power, the CLK_IO is
disabled when not in gang mode. All features within the
ADAS1000 are a function of the frequency of the externally
applied clock. Using a frequency other than the 8.192 MHz
previously noted causes scaling of the data rates, filter corners,
ac lead off frequency, respiration frequency, and pace algorithm
corners accordingly.
Table 24. CRC Polynomials
Frame Rate
CRC Size
Polynomial
Polynomial
in Hex
Check Constant
2 kHz, 16 kHz
24 bits
x24 + x22 + x20 + x19 + x18 + x16 + x14 + x13 + x11 + x10 + x8 + x7 + x6 + x3 + x1 + x0
0x15D6DCB
0x15A0BA
128 kHz
16 bits
x16 + x12 + x5 + x0
0x11021
0x1D0F
XTAL1
XTAL2
ADAS1000
CLK_IO
Rev. B | Page 53 of 80



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