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Si3050 Datasheet(PDF) 44 Page - Silicon Laboratories |
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Si3050 Datasheet(HTML) 44 Page - Silicon Laboratories |
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44 / 128 page ![]() Si3050 + Si3011/18/19 44 Rev. 1.5 5.33. Companding in PCM Mode The Si3050 supports both µ-Law and A-Law companding formats in addition to 16-bit linear data. The 8-bit companding schemes follow a segmented curve formatted as a sign bit, three chord bits, and four step bits. µ-Law is commonly used in North America and Japan, while A-Law is primarily used in Europe. Data format is selected via the PCMF bits (Register 33). Table 22 on page 45 and Table 23 on page 46 define the µ-Law and A-Law encoding formats. If linear mode is used the resulting 16-bit data is transmitted in two consecutive 8-bit PCM highway timeslots as shown in Figure 34. 5.34. 16 kHz Sampling Operation in PCM Mode The Si3050 can be configured to support a 16 kHz sampling rate and transmit the data on an 8 kHz PCM or GCI highway bus. By setting the HSSM bit (Register 7, bit 3) to 1, the DAA changes its sampling rate, Fs, to 16 kHz if it was originally configured for an 8 kHz sampling rate. If µ-law or A-law companding is used, the resulting 8-bit samples are transmitted in two consecutive 8-bit PCM highway timeslots. If linear mode is used, the resulting 16-bit samples are transmitted in four consecutive 8-bit PCM highway timeslots as shown in Figure 35. Figure 34. PCM Highway Transmission, Single Clock Cycle, 16-bit linear mode (TXS = RXS = 0, PHCF = 0, TRI = 1, PCMF = 11) Figure 35. PCM Highway Transmission, Single Clock Cycle, 16-bit linear mode (TXS = RXS = 0, PHCF = 0, TRI = 1, PCMF = 11, HSSM = 1) 01 7 6 5 4 3 2 16 15 14 13 12 11 10 9 818 17 MSB LSB MSB LSB HI-Z HI-Z PCLK FSYNC PCLK_CNT DRX DTX MSB MSB HI-Z LSB LSB HI-Z Sample 1 Sample 2 01 7 6 5 4 3 216 15 14 13 12 11 10 9 818 17 19 20 26 25 24 23 22 21 35 34 33 32 31 30 29 28 27 36 37 PCLK FSYNC PCLK_CNT DRX DTX |
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