LTC2662 datasheet(26/28 Pages) AD

26 / 28 page

LTC2662

Rev 0

For more information www.analog.com

OPERATION

Offset Current and Code Zero

The offset current error of the LTC2662 is guaranteed

±0.4%FSR maximum. If the offset of a given channel is

positive, some nonzero current flows at code zero; if nega-

tive, the current is zero (leakage only) for a range of codes

close to zero. Offset and linearity endpoints are measured

at code 384, guaranteeing that the DAC is operating with

a measurable output current at the point of measurement.

A channel with a positive offset error may not completely

turn off, even at code zero. To turn an output completely

off, set the range to “Hi-Z” (span code 0000b from

Table 3), and update the channel.

Reference Modes

The LTC2662 can be used with either an internal or exter-

nal reference. As with voltage DACs, the reference voltage

scales the outputs, so that the outputs reflect any errors

in the reference. Full scale output currents are limited to

300mA maximum per channel regardless of reference

voltage.

The internal 1.25V reference has a typical temperature

drift of ±2ppm/°C and an initial output tolerance of ±2mV

max. It is trimmed, tested and characterized independent

of the DACs; and the DACs are tested and characterized

with an “ideal” external reference.

To use the internal reference, the REFCOMP pin should be

left floating, with no DC path to GND. In addition, the RD

bit in the Config register must have a value of 0. This value

is reset to 0 at power-up, or it can be reset using the config

command, 0111b. Figure 9 shows the command syntax.

For reference stability and low noise, a 0.1μF capacitor

should be tied between REFCOMP and GND. In this con-

figuration, the internal reference can drive up to 0.1μF

with excellent stability. To ensure stable operation, the

capacitive load on the REF pin should not exceed that on

the REFCOMP pin. A buffer is needed if the internal refer-

ence is to drive external circuitry.

To use an external reference, tie the REFCOMP pin to GND.

This disables the output of the internal reference at start-

up, so that the REF pin becomes a high-impedance input.

Apply the reference voltage at the REF pin after powering

up. Set the RD bit to 1 using the config command, 0111b.

The REF input voltage range is 1.225V to 1.275V.

Board Layout

The excellent load regulation and DC crosstalk perfor-

mance of these devices is achieved in part by minimizing

common-mode resistance of signal and power grounds.

As with any high resolution converter, clean board ground-

ing is important. A low impedance analog ground plane

is necessary, as are star-grounding techniques. Keep the

board layer used for star-ground continuous to minimize

ground resistances; that is, use the star-ground concept

without using separate star traces. Resistance from the

REFLO pin to the star point should be as low as possible.

The exposed pad (Pin 33) is recommended as the star

ground point.

For best performance, stitch the ground plane with arrays

of vias on 150 to 200 mil centers connecting it with the

ground pours from the other board layers. This reduces

the overall ground resistance and minimizes ground loop

area.

LTC2662 Datasheet(PDF) 26 Page - Analog Devices

LTC2662 Datasheet(HTML) 26 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28

Datasheet Download

Link URL