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D17133CS Datasheet(PDF) 151 Page - NEC |
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D17133CS Datasheet(HTML) 151 Page - NEC |
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151 / 289 page ![]() CHAPTER 13 PERIPHERAL HARDWARE 136 Figure 13-12. Block Diagram of the Serial Interface Note The output latch of the shift register is common with the output latch of P0D1. Therefore, if an output instruction is executed for P0D1, the output latch state of the shift register is also changed. P0D2/SI LSB MSB P0D1/SO SIOTS SIOCK1 SIOCK0 SIOHIZ IRQSIO clear signal IRQSIO set signal Carry Clear Serial clock counter Clock P0D0/SCK SIOEN P0DBIO0 P0DBIO1 Shift register (SIOSFR) Q S R Selector Output latch Output latch Note One shot |
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