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D17133CS Datasheet(PDF) 153 Page - NEC |
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D17133CS Datasheet(HTML) 153 Page - NEC |
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153 / 289 page  CHAPTER 13 PERIPHERAL HARDWARE 138 (2) 8-bit receive mode (SO pin: high impedance state) When SIOHIZ=1, the P0D1/SO pin is placed in the high-impedance state. At this time, if "1" is written into SIOTS to start supply of the serial clock, the serial interface operates only the receiving function. Because the P0D1/SO pin is placed in the high-impedance state, it can be used as an input port (P0D1). Figure 13-14. Timing of the 8-Bit Reception Mode High impedance 123 4 5 6 7 8 DI7 DI6 DI5 DI4 DI3 DI2 DI1 DI0 SCK pin SO pin IRQSIO SI pin Transmission starts in synchronization with the SCK pin falling edge. An instruction which writes 1 into SIOTS is executed. (Transmission start indication) Transmission completion Remark DIn: Serial input data (3) Operation stop mode If the value in SIOTS (RF: address 1AH, bit 3) is 0, the serial interface enters operation stop mode. In this mode, no serial transfer occurs. In this mode, the shift register does not perform shifting and can be used as an ordinary 8-bit register. |
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