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AD9175 Datasheet(PDF) 52 Page - Analog Devices

Part # AD9175
Description  Dual, 11-Bit/16-Bit, 12.6 GSPS RF DAC with Wideband Channelizers
PDF  150 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9175 Datasheet(HTML) 52 Page - Analog Devices

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AD9175
Data Sheet
Rev. A | Page 52 of 150
CHANNEL DIGITAL DATAPATH
2×
2×
2×
3×
TO MAIN
DATAPATH
NCO
DIGITAL
GAIN
1×
2×
2×
2×
3×
NCO
DIGITAL
GAIN
2×
2×
2×
3×
NCO
DIGITAL
GAIN
Figure 74. Block Diagram of the Channel Digital Datapath per the Main DAC Output
Whether one or all of the channelizers in each datapath are
enabled is defined by the JESD204B mode selected by the
user. Each channelizer consists of a digital gain stage, complex
interpolation block, and a complex 48-bit modulus NCO. The
channelizers and the summing node can be fully bypassed (1×
interpolation selected). The interpolation rate selection is applied to
all channelizers and cannot be independently controlled.
However, the gain stage and complex NCO settings can all be
controlled independently. The controls for these blocks are
paged by the channel paging mask in the CHANNEL_PAGE
bits (Register 0x008, Bits[5:0]), as described in Table 36. Each
bit of the page mask corresponds to a channel datapath. The
channelizers can be either paged individually to apply settings
that are unique to a specific channel, or can be paged as a group
to address multiple channelizers using a single set of SPI writes.
Table 36. Channel Page Mask
CHANNEL_PAGE
(Register 0x008,
Bits[5:0])
Channel
Paged
Channel Datapath
Updated
0x01 (Bit 0)
Channel 0
Channel 0 of DAC0
0x02 (Bit 1)
Channel 1
Channel 1 of DAC0
0x04 (Bit 2)
Channel 2
Channel 2 of DAC0
0x08 (Bit 3)
Channel 3
Channel 0 of DAC1
0x10 (Bit 4)
Channel 4
Channel 1 of DAC1
0x20 (Bit 5)
Channel 5
Channel 2 of DAC1
Each of the digital blocks in the channels is described in more
detail in the following sections.
Digital Gain
Each channelizer has an independent gain control that allows
unique gain scaling for each complex data stream. The gain
code for each channel is 12-bit resolution, located in
Register 0x146 and Register 0x147, and can be calculated
by the following formula:
0 ≤ Gain ≤ (212 − 1)/211
−∞ dB < dB Gain ≤ +6.018 dB
Gain = Gain Code × (1/2048)
dB Gain = 20 × log10 (Gain)
Gain Code = 2048 × Gain = 211 ×10(dB Gain/20)
The gain code control (CHNL_GAIN) is paged with the
channel page mask (CHANNEL_PAGE) in Register 0x008,
Bits[5:0].
Because the output of all three channels is summed ahead of the
main datapath, extra care must be used when setting the gain to
avoid sample clipping if the combined amplitude exceeds full
scale after being summed. For example, if all three channels are
used and all three data streams contain samples that are >1/3
full scale, clipping may occur. In other words, at any specific
point in time, the sum of the samples at the output of all
enabled channels must be between −215 and +(215 − 1).
The digital gain feature is available in all JESD204B modes,
except when 1× channel interpolation is used because the
channel digital processing features are bypassed in that mode,
as shown in Figure 75.



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