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AD9175 Datasheet(PDF) 93 Page - Analog Devices |
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AD9175 Datasheet(HTML) 93 Page - Analog Devices |
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93 / 150 page  Data Sheet AD9175 Rev. A | Page 93 of 150 Addr. Name Bits Bit Name Settings Description Reset Access 0 Route IRQ trigger signal to the IRQ0 pin. 1 Route IRQ trigger signal to the IRQ1 pin. 0x02B IRQ_OUTPUT_MUX2 [7:6] RESERVED Reserved. 0x0 R 5 MUX_DLL_LOST If EN_DLL_LOST is set, this control chooses the IRQx output pin on which the event is triggered. 0x0 R/W 0 Route IRQ trigger signal to the IRQ0 pin. 1 Route IRQ trigger signal to the IRQ1 pin. 4 MUX_DLL_LOCK If EN_DLL_LOCK is set, this control chooses the IRQx output pin on which the event is triggered. 0x0 R/W 0 Route IRQ trigger signal to the IRQ0 pin. 1 Route IRQ trigger signal to the IRQ1 pin. [3:2] RESERVED Reserved. 0x0 R/W 1 MUX_PLL_LOST If EN_PLL_LOST is set, this control chooses the IRQx pin on which the event is triggered. 0x0 R/W 0 Route IRQ trigger signal to the IRQ0 pin. 1 Route IRQ trigger signal to the IRQ1 pin. 0 MUX_PLL_LOCK If EN_PLL_LOCK is set, this control chooses the IRQx pin on which the event is triggered. 0x0 R/W 0 Route IRQ trigger signal to the IRQ0 pin. 1 Route IRQ trigger signal to the IRQ1 pin. 0x02C IRQ_STATUS_ALL [7:1] RESERVED Reserved. 0x0 R 0 IRQ_STATUS_ALL This bit is an OR of all the bits in Register 0x24 to Register 0x27. Writing a one to this bit clears any latched IRQx signals in Register 0x24 to Register 0x27. 0x0 R/W 0x036 SYSREF_COUNT [7:0] SYSREF_COUNT Number of rising SYSREF± edges to ignore before synchronization (pulse counting mode). 0x0 R/W 0x039 SYSREF_ERR_ WINDOW 7 RESERVED Reserved. 0x0 R [6:0] SYSREF_ERR_ WINDOW Amount of jitter allowed on the SYSREF± input. SYSREF± jitter variations larger than this trigger an interrupt. Units are in DAC clocks. 0x0 R/W 0x03A SYSREF_MODE [7:5] RESERVED Reserved. 0x0 R 4 SYNC_ROTATION_ DONE Synchronization logic rotation complete flag. 0x1 R [3:2] RESERVED Reserved. 0x0 R 1 SYSREF_MODE_ ONESHOT Enable one-shot synchronization rotation mode. 0x0 R/W 00 Monitor mode. Status/error flag for IRQ_ SYSREF_JITTER is 1 if the SYSREF± edge is outside the error window (Register 0x039, Bits[6:0]). 01 Perform a single synchronization on the next SYSREF±, then switch to monitor mode. 0 RESERVED Reserved. 0x0 R/W 0x03B ROTATION_MODE 7 SYNCLOGIC_EN This bit must always be set to 1 (default) for both Subclass 0 and Subclass 1 operations. 0x1 R/W 6 RESERVED Reserved. For proper operation, write this bit to a 1. 0x0 R/W |
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