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AD9175 Datasheet(PDF) 99 Page - Analog Devices

Part # AD9175
Description  Dual, 11-Bit/16-Bit, 12.6 GSPS RF DAC with Wideband Channelizers
PDF  150 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9175 Datasheet(HTML) 99 Page - Analog Devices

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Data Sheet
AD9175
Rev. A | Page 99 of 150
Addr.
Name
Bits
Bit Name
Settings
Description
Reset
Access
1
With Bits[5:4] = 0b11 and the DAC1 main
NCO enabled, DAC0 = I0_NCO + I1_NCO,
DAC1 = Q0_NCO + Q1_NCO. With Bits[5:4] =
0b11 and the DAC1 main NCO disabled,
DAC0 = I0_NCO, DAC1 = Q0_NCO.
[5:4]
DDSM_MODE
Modulator switch mode selection. This
control chooses the mode of operation for
the main datapath NCO being configured.
This control is paged by the MAINDAC_
PAGE bits in Register 0x008.
0x0
R/W
00
DAC0 = I0; DAC1 = I1.
01
DAC0 = I0 + I1; DAC1 = Q0 + Q1.
10
DAC0 = I0; DAC1 = Q0.
11
DAC0 = I0 + I1; DAC1 = 0.
3
DDSM_NCO_EN
Main datapath modulation enable. If the
JESD204B mode chosen is a complex mode
(main datapath interpolation >1×), this bit
must be set to 1 for each main datapath
being used. If no modulation is desired, set
the FTW to be 0. This control is paged by
the MAINDAC_PAGE bits in Register 0x008.
0x0
R/W
0
Disable main datapath NCO.
1
Enable main datapath NCO.
2
DDSM_
MODULUS_EN
Enable main datapath modulus DDS. This
control is paged by the MAINDAC_PAGE
bits in Register 0x008.
0x0
R/W
0
Disable modulus DDS.
1
Enable modulus DDS.
1
DDSM_SEL_
SIDEBAND
Selects upper or lower sideband from
modulation result. This control is paged by
the MAINDAC_PAGE bits in Register 0x008.
0x0
R/W
0
Use upper sideband.
1
Use lower sideband = spectral flip.
0
EN_SYNC_ALL_
CHNL_NCO_RESETS
Selects the signal channel NCOS used for
resets and FTW updates. This control is
paged by the MAINDAC_PAGE bits in
Register 0x008.
0x1
R/W
0
Channel NCOs reset or update their FTW
based on channel NCO update requests.
1
Channel NCOs reset or update their FTW
based on main datapath NCO update
requests.
0x113
DDSM_FTW_
UPDATE
7
RESERVED
Reserved.
0x0
R
[6:4]
DDSM_FTW_REQ_
MODE
Frequency tuning word automatic update
mode. This control is paged by the
MAINDAC_PAGE bits in Register 0x008.
0x0
R/W
000
No automatic requests are generated when
the FTW registers are written.
001
Automatically generates a DDSM_FTW_
LOAD_REQ after DDSM_FTW Bits[7:0] are
written.
010
Automatically generates a DDSM_FTW_
LOAD_REQ after DDSM_FTW Bits[15:8] are
written.
011
Automatically generates a DDSM_FTW_
LOAD_REQ after DDSM_FTW Bits[23:16] are
written.



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