AD9175 datasheet(2/150 Pages) AD

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AD9175

Data Sheet

Rev. A | Page 2 of 150

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

General Description ......................................................................... 1

Product Highlights ........................................................................... 1

Revision History ............................................................................... 2

Functional Block Diagram .............................................................. 3

Specifications..................................................................................... 4

DC Specifications ......................................................................... 4

Digital Specifications ................................................................... 5

Maximum DAC Sampling Rate Specifications......................... 5

Power Supply DC Specifications ................................................ 6

Serial Port and CMOS Pin Specifications ................................. 8

Digital Input Data Timing Specifications ................................. 9

JESD204B Interface Electrical and Speed Specifications ...... 10

Input Data Rates and Signal Bandwidth Specifications ........ 11

AC Specifications........................................................................ 12

Absolute Maximum Ratings.......................................................... 14

Reflow Profile.............................................................................. 14

Thermal Characteristics ............................................................ 14

ESD Caution................................................................................ 14

Pin Configuration and Function Descriptions........................... 15

Typical Performance Characteristics ........................................... 18

Terminology .................................................................................... 26

Theory of Operation ...................................................................... 27

Serial Port Operation ..................................................................... 29

Data Format ................................................................................ 29

Serial Port Pin Descriptions...................................................... 29

Serial Port Options ..................................................................... 30

JESD204B Serial Data Interface.................................................... 31

JESD204B Overview .................................................................. 31

Physical Layer ............................................................................. 35

Data Link Layer .......................................................................... 37

Syncing LMFC Signals............................................................... 39

Transport Layer .......................................................................... 45

JESD204B Test Modes ............................................................... 46

JESD204B Error Monitoring..................................................... 48

Digital Datapath ............................................................................. 51

Total Datapath Interpolation .................................................... 51

Channel Digital Datapath ......................................................... 52

Main Digital Datapath ............................................................... 55

NCO Only Mode ........................................................................ 59

Modulator Switch ....................................................................... 59

Interrupt Request Operation ........................................................ 63

Interrupt Service Routine.......................................................... 63

Analog Interface ............................................................................. 64

DAC Input Clock Configurations............................................ 64

Clock Output Driver.................................................................. 66

Analog Outputs .......................................................................... 66

Applications Information .............................................................. 68

Hardware Considerations ......................................................... 68

Start-Up Sequence.......................................................................... 71

Outline Dimensions ..................................................................... 150

Ordering Guide ........................................................................ 150

REVISION HISTORY

5/2019—Rev. 0 to Rev. A

Changes to Table 9.......................................................................... 13

Changes to Table 17........................................................................ 32

Change to Table 18 ......................................................................... 33

Changes to SYSREF± Sampling Section...................................... 40

Changes to Subclass 1 Section ...................................................... 41

Change to Table 37 ......................................................................... 53

Change to Calibration NCO Section ........................................... 58

Change to Complex Modulator Switch Configurations

Section.............................................................................................. 61

Changes to DAC On-Chip PLL Section ...................................... 65

Changes to Table 51 ....................................................................... 71

Changes to Table 60 ....................................................................... 78

Changes to Table 61 ....................................................................... 89

12/2018—Revision 0: Initial Version

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